Verification by error modeling : using testing techniques in hardware verification
Title
: 
Verification by error modeling : using testing techniques in hardware verification

Personal Author
: 
Radecka, Katarzyna

Series
: 
Frontiers in electronic testing ; 25

Publication Information
: 
Dordrecht : Kluwer Academic Pubs., 2003

ISBN
: 
9781402076527

Subject Term
: 
Integrated circuits -- Very large scale integration -- Computer-aided design
 
Integrated circuits -- Verification
 
Error analysis (Mathematics)

Added Author
: 
Zilic, Zeljko


LibraryItem BarcodeCall NumberMaterial TypeItem Category 1
PSZ JB30000010082071TK7874.75 R32 2003Open Access BookBook