A VHDL module generator for fast prototyping of multimedia data processing ASICs
Title
A VHDL module generator for fast prototyping of multimedia data processing ASICs

Personal Author
Mohamed Khalil Mohd. Hani

Series
Siri kertas kerja penyelidikan (Universiti Teknologi Malaysia. Pusat Pengurusan Penyelidikan)

Publication Information
Skudai : Universiti Teknologi Malaysia, 1999

Subject Term
Electronic circuit design -- Data processing
 
VHDL (Computer hardware description language)

Added Author
Koay, Kah Hoe

Added Conference Author
World Engineering Congress (1999 : Kuala Lumpur)


LibraryItem BarcodeCall NumberMaterial TypeItem Category 1
Perpustakaan Raja Zarith Sofiah30000004536151TK7885.7 M53 1999Closed Access Book1:BOOK_ARC
PSZ JB30000004536110TK7885.7 M53 1999Open Access BookProceedings, Conference, Workshop etc.
PSZ JB30000004536078TK7885.7 M53 1999Open Access BookProceedings, Conference, Workshop etc.
PSZ KL30000004536037TK7885.7 M53 1999Open Access BookBook