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Fakulti Kejuruteraan Elektrik
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Asrani Lit, 1984-
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Networks on a chip
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Cover image for An enhanced simulated annealing approach for cylindrical, rectangular mesh and semi-diagonal torus network topologies
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Cover image for An enhanced simulated annealing approach for cylindrical, rectangular mesh and semi-diagonal torus network topologies
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Cover image for Network-on-chip floorplanning and application mapping using cross-entropy method
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Cover image for Network-on-chip floorplanning and application mapping using cross-entropy method
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Cover image for Networks-on-chip : from implementations to programming paradigms
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Cover image for Network-on-chip fault detection and router self-test
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Cover image for Adaptive look ahead routing for low latency network on chip
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Cover image for Adaptive look ahead routing for low latency network on chip
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Cover image for Designing 2D and 3D network-on-chip architectures
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Cover image for Network-on-chip fault detection and router self-test
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Cover image for Amba Axi bus to network-on-chip bridge
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Cover image for Amba Axi bus to network-on-chip bridge
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