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Print
1. 
Cover image for Integration : the VLSI journal
2. 
Cover image for VLSI electronics : microstructure science
3. 
Cover image for VLSI design of present encryption algorithm
4. 
Cover image for VLSI design of present encryption algorithm
5. 
Cover image for VLSI design of bluetooth link layer controller
6. 
Cover image for VLSI design of bluetooth link layer controller
7. 
Cover image for VLSI implementation of kogge stone adder
8. 
Cover image for VLSI implementation of kogge stone adder
9. 
Cover image for VLSI design of fast pipelined discrete cosine transform
10. 
Cover image for VLSI design of fast pipelined discrete cosine transform
11. 
Cover image for VLSI : circuits for emerging applications
12. 
Cover image for IC fabrication technology
13. 
Cover image for Top-down vlsi design : from architectures to gate -level circuits and FPGAs
14. 
Cover image for Trace-based post-silicon validation for VLSI circuits
15. 
Cover image for Technology computer aided design : simulation for VLSI MOSFET
16. 
Cover image for Bio/CMOS interfaces and co-design
17. 
Cover image for VLSI design
18. 
Cover image for Fundamentals of ultra-thin-body MOSFETs and FinFETs
19. 
Cover image for Designing schematic diagrams for 0.35um MIMOS cell library - Part IV
20. 
Cover image for Performance comparison of NxN matrix multiplication between field programmable gate array and general purpose processor
21. 
Cover image for Performance comparison of NxN matrix multiplication between field programmable gate array and general purpose processor
22. 
Cover image for VLSI design of sorting algorithm
23. 
Cover image for Materials, processes, and reliability for advanced interconnects for micro- and nanoelectronics--2011 : symposium held April 25-29, 2011, San Francisco, California, U.S.A.
24. 
Cover image for VLSI design of sorting algorithm
25. 
Cover image for Power dissipation in vlsi wire routing via binary particle swarm optimization technique
26. 
Cover image for Power dissipation in vlsi wire routing via binary particle swarm optimization technique
27. 
Cover image for Digital VLSI design
28. 
Cover image for Analog and mixed mode VLSI design
29. 
Cover image for Modified pattern generator of built-in self test for sequential circuits with reduced test time
30. 
Cover image for CMOS VLSI design : a circuits and systems perspective
31. 
Cover image for Integrated circuit design
32. 
Cover image for Modified pattern generator of built-in self test for sequential circuits with reduced test time
33. 
Cover image for VLSI physical design : from graph partitioning to timing closure
34. 
Cover image for Low-power design of nanometer FPGAs : architecture and EDA
35. 
Cover image for Crosstalk minimization in VLSI routing using particle swarm optimization
36. 
Cover image for Nanoscale CMOS VLSI circuits : design for manufacturability
37. 
Cover image for A particle swarm optimization (PSO) for vlsi routing
38. 
Cover image for A particle swarm optimization (PSO) for vlsi routing
39. 
Cover image for PSPICE and MATLAB for electronics : an integrated approach
40. 
Cover image for Simulation of an important step in VLSI fabrication
41. 
Cover image for Fundamentals of modern VLSI devices
42. 
Cover image for Compact MOSFET models for VLSI design
43. 
Cover image for Handbook of algorithms for physical design automation
44. 
Cover image for VLSI circuit design methodology demystified : a conceptual taxonomy
45. 
Cover image for A computer aided design software module for clock tree synthesis in very large scale integration design
46. 
Cover image for Digital VLSI design with verilog : a textbook from silicon valley technical institute
47. 
Cover image for Nanometer technology designs : high quality delay tests
48. 
Cover image for Digital VLSI design with verilog : a textbook from silicon valley technical institute
49. 
Cover image for Practical problems in VLSI physical design automation
50. 
Cover image for Network infrastructure and architecture : designing high-availability networks
51. 
Cover image for VLSI circuits for biomedical applications
52. 
Cover image for Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring
53. 
Cover image for Timing optimization through clock skew scheduling
54. 
Cover image for A computer aided design software module for clock tree synthesis in very large scale integration design
55. 
Cover image for Modern circuit placement : best practices and results
56. 
Cover image for High-speed VLSI interconnections
57. 
Cover image for Defect-oriented testing for nano-metric CMOS VLSI circuits
58. 
Cover image for Vlsi implementation of low noise amplifier for RF transceiver
59. 
Cover image for Vlsi implementation of bandpass filter for CMOS RF transceiver
60. 
Cover image for Routing congestion in VLSI circuits : estimation and optimization
61. 
Cover image for Advanced model order reduction techniques in VLSI design
62. 
Cover image for VLSI design of wavelet transform : analysis, architecture and design analysis
63. 
Cover image for The VLSI handbook
64. 
Cover image for Vlsi implementation and design of a bandgap voltage reference
65. 
Cover image for Designing schematic diagrams for 0.35um MIMOS cell library
66. 
Cover image for Vlsi implementation of low noise amplifier for RF transceiver
67. 
Cover image for Vlsi implementation of bandpass filter for CMOS RF transceiver
68. 
Cover image for Vlsi implementation and design of a bandgap voltage reference
69. 
Cover image for Mosfet modeling for VLSI simulation : theory and practice
70. 
Cover image for Introduction to parallel processing
71. 
Cover image for Merekabentuk rajah skematik untuk cell library 0.35um MIMOS - bahagian V1
72. 
Cover image for Digital system emulator with design verification features
73. 
Cover image for Wireless IC testing on FPGA platform
74. 
Cover image for Developing a computer - based malay auditory discrimination assessment
75. 
Cover image for VLSI-SOC, from systems to chips : IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany
76. 
Cover image for Schematic design for MIMOS's 0.35um cell library part 1
77. 
Cover image for VLSI implementation of low-pass filter for RF transceiver /cMuhammad Faris Muhammad Indra
78. 
Cover image for Designing schematic diagrams for 0.35uM MIMOS cell library (part V)
79. 
Cover image for Schematic design for MIMOS'S 0.35um cell library part 11
80. 
Cover image for Merekabentuk rajah skematik cell library 0.35um MIMOS bahagian 111
81. 
Cover image for VLSI implementation of ADC circuit
82. 
Cover image for VLSI design of shortest path processor using MIMOS 0.35um cell library - design II
83. 
Cover image for VLSI implementation of band pass filter for RF transceiver
84. 
Cover image for Designing schematic diagrams for 0.35um MIMOS cell library - Part IV
85. 
Cover image for R-trees : theory and applications
86. 
Cover image for VLSI test principles and architectures : design for testability
87. 
Cover image for VLSI design of shortest path processor using MIMOS 0.35um cell library - design II
88. 
Cover image for Chip design for submicron VLSI : CMOS layout and simulation
89. 
Cover image for VLSI implementation of low noise amplifier for RF transceiver
90. 
Cover image for VLSI implementation of mixer for CMOS RF transceiver
91. 
Cover image for Vlsi design of shortest path processor using MIMOS 0.35um cell library - design 1
92. 
Cover image for Applications of specification and design languages for SoCs : selected papers from FDL 2005
93. 
Cover image for Chip design for submicron VLSI CMOS layout and simulation
94. 
Cover image for Uninterruptible power supply
95. 
Cover image for Design and fabrication of A 2 - AXIS mechanism for an active solar tracking system using PIC microcontroller
96. 
Cover image for Analysis for prediction/detection of epileptic seizure using Matlab
97. 
Cover image for Rotary vane type stairs climbing robot
98. 
Cover image for Digital system emulator with design verification features
99. 
Cover image for Logic synthesis and verification algorithms
100. 
Cover image for Multiscale optimization methods and applications
101. 
Cover image for Designing 1KB SRAM
102. 
Cover image for Modeling and simulation of deep submicron mosfet
103. 
Cover image for Statistical analysis and optimization for VLSI : timing and power
104. 
Cover image for Single-row transformation of graphs
105. 
Cover image for Kesan kepada sifat-sifat elektrik akibat radiasi sinar-gamma dan neutron pada transistor kesan medan logam oksida-silikon (MOSFET)
106. 
Cover image for Very large scale integrated circuit (VLSI) of a neurohardware processor implementing the kohonen neural network algorithm
107. 
Cover image for Single-row transformation of graphs
108. 
Cover image for Kesan kepada sifat-sifat elektrik akibat radiasi sinar-gamma dan neutron pada transistor kesan medan logam oksida-silikon (MOSFET)
109. 
Cover image for CMOS VLSI design : a circuits and systems perspective
110. 
Cover image for Very large scale integrated circuit (VLSI) of a neurohardware processor implementing the kohonen neural network algorithm
111. 
Cover image for Broadband circuits for optical fiber communication
112. 
Cover image for Symbolic analysis and reduction of VLSI circuits
113. 
Cover image for VLSI-design of non-volatile memories
114. 
Cover image for Contemporary logic design
115. 
Cover image for Essentials of vlsi circuits and systems
116. 
Cover image for Bioengineered and bioinspired systems II : 9-11 May, 2005, Seville, Spain
117. 
Cover image for Asas-asas seni kriptografi klasik dan moden
118. 
Cover image for Design & implementation (VLSI) of an all digital phase locked loop (ADPLL)
119. 
Cover image for VLSI design of 8X8 BIT unsigned parallel multiplier using L.DADDA reduction tree method
120. 
Cover image for ISE student edition
121. 
Cover image for Comparison of VLSI adders
122. 
Cover image for FPGA-based system design
123. 
Cover image for An experimental approach to CDMA and interference mitigation : from system architecture to hardware testing through VLSI design
124. 
Cover image for Comparison of VLSI adders
125. 
Cover image for VLSI design of a neural network computation engine ASIC microchip
126. 
Cover image for Assertion-based design
127. 
Cover image for Timing
128. 
Cover image for VLSI design of 8X8 BIT unsigned parallel multiplier using L. Dadda reduction tree method
129. 
Cover image for Power distribution network design for VLSI
130. 
Cover image for Low cost PLC (Program Logic Control)
131. 
Cover image for Characteristic study on various overvoltage protectors
132. 
Cover image for The hybrid electrical vehicle
133. 
Cover image for Analog VLSI design automation
134. 
Cover image for VLSI design of signed parallel division
135. 
Cover image for VLSI design of equalizer in PRML disc drive channels
136. 
Cover image for Rekabentuk VLSI bagi litar pendarab voltan rendah 8-bit
137. 
Cover image for Rekabentuk VLSI bagi litar pendarab voltan rendah 8-bit
138. 
Cover image for Verification by error modeling : using testing techniques in hardware verification
139. 
Cover image for Logic design
140. 
Cover image for Intellectual property protection in VLSI designs : theory and practice
141. 
Cover image for VLSI design of equalizer PRML disc drive channels
142. 
Cover image for Implementasi algoritma penjadual iSLIP dalam VLSI
143. 
Cover image for Vlsi design of automatic dispenser controller
144. 
Cover image for Assertion-based design
145. 
Cover image for Design of an analogue filter in VLSI
146. 
Cover image for Placement and routing in VLSI design problem using single row routing technique
147. 
Cover image for VLSI design of CMOS correlator
148. 
Cover image for Intelligent system for modern cars
149. 
Cover image for Placement and routing in VLSI design problem using single row routing technique
150. 
Cover image for Rekabentuk VLSI bagi litar pendarab voltan rendah 8-bit
151. 
Cover image for VLSI design of low-voltage digital signal processing application using complementary pass-transistor logic
152. 
Cover image for Alat bantuan bekalan kuasa elektrik
153. 
Cover image for VLSI design-8-bit digital to analog converter using CMOS technology
154. 
Cover image for Mixed analog-digital VLSI devices and technology
155. 
Cover image for Introduction to microelectronic fabrication
156. 
Cover image for VLSI implementation of batcher sorting network
157. 
Cover image for VLSI design of banyan switch model
158. 
Cover image for VLSI implementation on varialble register delay
159. 
Cover image for Introduction to VLSI circuits and systems
160. 
Cover image for Pspice and matlab for electronics : an integrated approach
161. 
Cover image for Introduction to VLSI circuits and systems
162. 
Cover image for VLSI for wireless communication
163. 
Cover image for VLSI layout of a segment of a 32 bit RISC processor core
164. 
Cover image for VLSI layouts for instruction fetch stage and instruction decode stage of a 32 bit RISC processor core
165. 
Cover image for SRAM built-in self test
166. 
Cover image for Design a Built-In Current Sensor (BICS) for digital circuit test
167. 
Cover image for A high precision current-mode VLSI Loser-Take-All (LTA) circuit
168. 
Cover image for WTA pulse-coded neural network implementation in VLSI
169. 
Cover image for VLSI design for 8 bit segmented digital to analog converter
170. 
Cover image for VHDL design of 32-bit parallel multiplier using the L. DADDA reduction tree method
171. 
Cover image for VLSI implementation of batcher sorting network
172. 
Cover image for VLSI design of banyan switch model
173. 
Cover image for VLSI implementation on varialble register delay
174. 
Cover image for Silicon wafer bonding technology : for VLSI and MEMS applications
175. 
Cover image for Pembelajaran berbantu komputer bagi teori litar elektrik
176. 
Cover image for Speed supervisory control via parallel port
177. 
Cover image for The design and construction of a surge protector for low voltage equipment (Class A)
178. 
Cover image for Handbook of VLSI microlithography : principles, technology, and applications
179. 
Cover image for Rekabentuk VLSI komponen penyahkod post entropy di dalam binaan modul penyahkod JPEG
180. 
Cover image for Pulse-coded neural network implementation in vlsi
181. 
Cover image for VLSI design
182. 
Cover image for Incorporating DFT into a one lane traffic controller
183. 
Cover image for Rekabentuk sistem siaraya
184. 
Cover image for Silicon VLSI technology : fundamentals, practice and modeling
185. 
Cover image for Rekabentuk VLSI bagi litar pendarab
186. 
Cover image for The VLSI handbook
187. 
Cover image for Electrothermal analysis of VLSI systems
188. 
Cover image for Essentials of electronic testing for digital, memory and mixed - signal VLSI circuits
189. 
Cover image for Heterogeneous optoelectronic integration : proceedings of a conference held 25 January 2000, San Jose, California
190. 
Cover image for Pulse coded neural network implementation VLSI
191. 
Cover image for A first course in digital systems design : an integrated approach
192. 
Cover image for IC test process simulation
193. 
Cover image for VLSI design of a 5-stage FIR filter ... [et al.]
194. 
Cover image for Penentuan gangguan peralatan telekomunikasi sistem digital gelombang mikro di Malaysia ... [et al.]
195. 
Cover image for VHDL design and CPLD implementation of decorrelator
196. 
Cover image for An efficient parallel algorithms for rectangle and midpoint methods on sequent S27 system
197. 
Cover image for An overview on related issues in integrated circuits test - part 1
198. 
Cover image for VLSI design of a 5-stage FIR filter
199. 
Cover image for Algorithms, complexity analysis and VLSI architecture for MPEG-4 motion estimation
200. 
Cover image for High-performance VLSI signal processing : innovative architectures and algorithms
201. 
Cover image for Fundamentals of modern VLSI devices
202. 
Cover image for VLSI - compatible implementations for artificial neural networks
203. 
Cover image for Mixed analog-digital VLSI devices and technology : an introduction
204. 
Cover image for High-performance digital VLSI circuit design
205. 
Cover image for Synthesis of power distribution to manage signal integrity in mixed-signal ICs
206. 
Cover image for Pipelined lattice and wave digital recursive filters
207. 
Cover image for Routing in the third dimension : from VLSI chips to MCMs
208. 
Cover image for VLSI digital signal processors : an introduction to rapid prototyping and design synthesis
209. 
Cover image for VLSI physical design automation : theory and practice
210. 
Cover image for Clock distribution networks in VLSI circuits and systems
211. 
Cover image for VLSI and parallel computing for pattern recognition and artificial intelligence
212. 
Cover image for Analysis and synthesis of microwave active filters for present and new generations of mobile communication systems in the 0.8 and 1.7 GHZ band; A VLSI computing structure array processor; Monopole and printed diversity antenna for hand-held radio phone; Penyerapan teknologi komputer peribadi dalam jabatan-jabatan kerajaan; Design and construction of GMSK bit error rate measurement system for PCN applications
213. 
Cover image for Basic VLSI design
214. 
Cover image for Asynchronous circuit design for VLSI signal processing
215. 
Cover image for Contemporary logic design
216. 
Cover image for Analisis dan reka bentuk sistem VLSI
217. 
Cover image for Introduction to VLSI technology
218. 
Cover image for Design of analog-digital VLSI circuits for telecommunications and signal processing
219. 
Cover image for VLSI fabrication principles : silicon and gallium arsenide
220. 
Cover image for Basic VLSI design
221. 
Cover image for Analog VLSI : signal and information processing
222. 
Cover image for Circuit design and layout of digital encryption processor
223. 
Cover image for A VLSI computing structure array processor
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Cover image for VLSI algorithm processor
225. 
Cover image for VLSI design of a new fast parallel binary adder
226. 
Cover image for Design of a two-phase non overlapping clock generator for VLSI circuits
227. 
Cover image for Semiconductor device processing : technology trends in the VLSI era
228. 
Cover image for Introduction to parallel processing
229. 
Cover image for Mosfet models for VLSI circuit simulation : theory and practice
230. 
Cover image for Semiconductor device modeling for VLSI : with the AIM-spice circuit simulator
231. 
Cover image for VLSI design of a new fast parallel binary adder; A low power inverter; Acquisition and analysis of low frequency signals using sound galaxy card; Computer-aided design tool for active filter network design : afinds (active filter network design system); Design of a two phase non overlapping clock generator for VLSI circuits ; Pulse rate monitoring ; VLSI algorithm processor
232. 
Cover image for Modeling of ion implantation in VLSI fabrication process
233. 
Cover image for Circuit design and layout of digital encryption processor
234. 
Cover image for Principles of CMOS VLSI design : a systems perspective
235. 
Cover image for Digital encryption processor (Part I) VLSI implementation of data encryption standard (DES)
236. 
Cover image for PC-based layout editor for drawing shapes of photomask geometries
237. 
Cover image for Chemical vapor deposition of tungsten and tungsten silicides : for VLSI/ULSI applications
238. 
Cover image for Digital encryption processor (Part II) VLSI implementation of microsequencer
239. 
Cover image for Algorithms and parallel VLSI architecture II : proceedings
240. 
Cover image for Supporting features for the unattended host module IBM PC; Merekabentuk alat permodulatan FM Stereo pada frekuensi 1 MHz dengan jalursisi sebanyak 100 KHz; Merekabentuk penguatkuasa pada frekuensi 80 MHz hingga 100 MHz dengan jalursisi sebanyak 100 KHz; The design of L-C passive bandpass filter for low power radio repeater; PC-based layout editor for drawing shapes of photomask geometries; Antenna radiation pattern analysis and design using computer modelling; Mengkaji dan merekabentuk penguatkuasa odio; Simulation and macromodelling of a operational amplifier; Merekabentuk penguatkuasa odio pada frekuensi 80 MHz sehingga 100 MHz dengan jalursisi sebanyak 100 KHz
241. 
Cover image for Statistical package for mobile radio (SPMR); Low power radio repeater (Part II); Penganalisaan data penerima dalam julat frekuensi ultra (UHF) dalam penggunaan radio bergerak; Rekabentuk penukar terbang balik; Digital encryption processor (Part II) VLSI implementation of microsequencer; Sistem pengawasan perambatan gelombang frekuensi tinggi II; Design of a resonant mode power supply; Digital encryption processor (Part I) VLSI implementation of data encryption standard (DES); A 27 MHz mobile transceiver design; Adaptive enhancement of a noisy UHF radio signal; Penyelakuan litar elektronik (Spice)
242. 
Cover image for Object-oriented databases with applications to CASE, networks, and VLSI CAD
243. 
Cover image for Dry etching for VLSI
244. 
Cover image for VLSI circuits and systems in silicon
245. 
Cover image for Handbook of VLSI microlithography : principles, technology and applications
246. 
Cover image for CAD accelerators : proceedings of the International Workshop on Hardware Accelerators for CAD, Oxford University, September 20-21, 1989
247. 
Cover image for Hardware annealing in analog VLSI neurocomputing
248. 
Cover image for VLSI design of digital crosspoint switch
249. 
Cover image for Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 Workshop on Logic and Architecture Synthesis, Paris, France, 30 May-1 June 1990
250. 
Cover image for Node supervisor for a hypercube parallel computer
251. 
Cover image for Macromodelling of integrated circuit operational amplifiers ; Design of optical video transceiver using pulse frequency modulation ; Fast wave propagation in the gas insulation system ; Cost-benefit analysis of energy management in industry ; Dynamic economic dispatch for large-scale power systems ; VLSI design of digital crosspoint switch ; Evaluation of the performance of a pulsewidth modulation (PWM) AC to DC converters ; Prolog-based silicon compilers ; Investigation on various parallel processing architecture to be used in a multiarchitecture distributed backend processing system ; Utilization of capital intensive electrical and electronic equipment in the national polytechnics and vocational schools ; Back-up power protection system based on personal computer
252. 
Cover image for VLSI design techniques for analog and digital circuits
253. 
Cover image for Introduction to analog VLSI design automation
254. 
Cover image for Fundamentals of digital logic design : with VLSI circuit applications
255. 
Cover image for Formal methods for VLSI design : IFIP WG 10.5 lecture notes
256. 
Cover image for Data-structure builder for VLSI/CAD software
257. 
Cover image for 16-bit VLSI multiplier
258. 
Cover image for Circuits, interconnections, and packaging for VLSI
259. 
Cover image for Principles of VLSI system planning : a framework for conceptual design
260. 
Cover image for Introduction to VLSI design
261. 
Cover image for CMOS devices and technology for VLSI
262. 
Cover image for VLSI design of infinite impulse response (IIR) digital filter
263. 
Cover image for 16-bit VLSI multiplier
264. 
Cover image for VLSI design 16 bit arithmetic logic unit
265. 
Cover image for Planar processing primer
266. 
Cover image for Design and test techniques for VLSI and WSI circuits
267. 
Cover image for Merekabentuk pengesan isyarat dan unit pembatalan gangguan menggunakan VLSI
268. 
Cover image for Intuitive CMOS electronics: the revolution in VLSI, processing, packaging, and design
269. 
Cover image for Quality engineering using robust design
270. 
Cover image for Parallel processing architecture and VLSI hardware
271. 
Cover image for VLSI placement and routing : the PI project
272. 
Cover image for Switch-level timing simulation of MOS VLSI circuits
273. 
Cover image for Logic and architecture synthesis for silicon compilers
274. 
Cover image for Sistem ukuran-konsep dan rekabentuk ; The design and construction of digital weighing machine based on the motorola M-6802 microprocessor ; Simulation of a cerebellar model arithmetic computer ; Further application of the versatile autoprogrammer system ; Siso discrete frequency domain design ; Merekabentuk pengesan isyarat dan unit pembatalan gangguan menggunakan VLSI ; Improvement in mathematical thermal modelling of a insulated power cable ; Design and implementation of a heterogeneous tightly coupled distributed multimicrocomputer system
275. 
Cover image for Very large scale integration (VLSI) design of a channel estimator; The development of power electronic ; Kimpalan frekuensi tinggi; Pemancar frekuensi tinggi; Rekabentuk VLSI pemproses enkripsi digital; Merekabentuk dan membina sebuah bekalan kuasa pensiusan berpengaturan; Universal interfacing amplifier for personal computers; Sistem penghantaran data optik
276. 
Cover image for VISI design of digital encryption processor (DEP)
277. 
Cover image for VISI design of digital encryption processor (DEP); The usage of silicon as a sensor materials
278. 
Cover image for Semiconductor materials and process technology handbook : for very large scale integration (VLSI) and ultra large scale integration (ULSI)
279. 
Cover image for VLSI engineering
280. 
Cover image for VLSI array processors
281. 
Cover image for Analog VLSI design NMOS and CMOS
282. 
Cover image for The transition from severe to mild wear in low alloy steel; Pengurusan pasar besar Kota Bharu, Kelantan; Occam and Fortran programs on transputers; Kajian pelaburan dan pengurusannya ke atas harta-harta Tabung Haji; Housing finance in Peninsular Malaysia; Kajian ke atas gunaan dan pembangunan hartanah keretapi Tanah Melayu di Wilayah Persekutuan; The housing situation in Peninsular Malaysia; Corporate sector in property in Malaysia : the recent trend
283. 
Cover image for VLSI technology
284. 
Cover image for Hardware accelerators for electrical CAD
285. 
Cover image for CMOS3 cell library
286. 
Cover image for Introduction to microelectronic fabrication
287. 
Cover image for Silicon compilation
288. 
Cover image for CMOS digital circuit technology
289. 
Cover image for Introduction to VLSI testing
290. 
Cover image for VLSI placement and global routing using simulated annealing
291. 
Cover image for Materials and process characterization for VLSI
292. 
Cover image for Simulated annealing for VLSI design
293. 
Cover image for Multi-level simulation for VLSI design
294. 
Cover image for The physics of VLSI systems
295. 
Cover image for Computer aided tools for VLSI system design
296. 
Cover image for Computer aids for VLSI design
297. 
Cover image for Selected papers on logic synthesis for integrated circuits design
298. 
Cover image for Basic VLSI design : systems and circuits
299. 
Cover image for Relaxation techniques for the simulation of VLSI circuits
300. 
Cover image for Circuit analysis, simulation and design
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