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Summary
Summary
The First Comprehensive, Example-Rich Guide to Power Integrity Modeling
Professionals such as signal integrity engineers, package designers, and system architects need to thoroughly understand signal and power integrity issues in order to successfully design packages and boards for high speed systems. Now, for the first time, there's a complete guide to power integrity modeling: everything you need to know, from the basics through the state of the art.
Using realistic case studies and downloadable software examples, two leading experts demonstrate today's best techniques for designing and modeling interconnects to efficiently distribute power and minimize noise.
The authors carefully introduce the core concepts of power distribution design, systematically present and compare leading techniques for modeling noise, and link these techniques to specific applications. Their many examples range from the simplest (using analytical equations to compute power supply noise) through complex system-level applications.
The authors
Introduce power delivery network components, analysis, high-frequency measurement, and modeling requirements Thoroughly explain modeling of power/ground planes, including plane behavior, lumped modeling, distributed circuit-based approaches, and much more Offer in-depth coverage of simultaneous switching noise, including modeling for return currents using time- and frequency-domain analysis Introduce several leading time-domain simulation methods, such as macromodeling, and discuss their advantages and disadvantages Present the application of the modeling methods on several advanced case studies that include high-speed servers, high-speed differential signaling, chip package analysis, materials characterization, embedded decoupling capacitors, and electromagnetic bandgap structuresThis book's system-level focus and practical examples will make it indispensable for every student and professional concerned with power integrity, including electrical engineers, system designers, signal integrity engineers, and materials scientists. It will also be valuable to developers building software that helps to analyze high-speed systems.
Author Notes
Madhavan Swaminathan is Joseph M. Pettit Professor in Electronics at the School of Electrical and Computer Engineering, and Deputy Director of the Packaging Research Center at Georgia Tech.
A. Ege Engin is Research Engineer in the School of Electrical and Computer Engineering and Assistant Research Director of the Packaging Research Center at Georgia Tech.
Excerpts
Excerpts
During my (M.S.) undergraduate days in a little town called Tiruchirapalli in Southern India, we used to have frequent voltage and current surges that knocked out all the electrical equipment such as fans and lights in our rooms. Frustrated, my friend once remarked, "We are powerless to solve the current problem." Of course, he meant this in jest, but little did I realize that his statement would become the theme of my research for many years. Although my area of specialty is semiconductors and computer systems, the issues related to power haven't changed. Power represents the major bottleneck in modern semiconductors and systems. With transistor scaling over the last two decades, Moore's law has enabled the integration of millions of transistors within an integrated circuit. With lower gate capacitance and lower voltage, faster transistors have become available with each new generation of computers. However, increased transistor integration has resulted in an increase in the current supplied to the integrated circuit, thereby increasing power. Managing the transient current supplied to the integrated circuit at gigahertz frequencies is one of the biggest challenges faced by the semiconductor industry. With lowering of the supply voltage to the transistors, dynamic variation in the power supply due to current transients is becoming a major bottleneck. The dynamic variation of the supply voltage, also called power supply noise, delta I noise, or simultaneous switching noise, is the subject of this book. Managing power integrity is the process by which the variations on the power supply of the transistors can be maintained within a specified tolerance value. Noise on the power supply can have a direct influence on the speed of an integrated circuit, and hence supplying clean power is a very important element in the design of a computer system. A power distribution network consists of interconnections in the chip, package, and board that include decoupling capacitors, ferrite beads, DC-DC converters, and other components. Both the package and board form a very critical part of the power distribution network, which is the focus of this book. The book covers two aspects of power distribution: design and modeling, with an emphasis on modeling. The book is organized into five chapters, which cover basic and advanced concepts. All chapters contain several examples to illustrate the concepts, some of which can be reproduced using the software provided. These examples can also be used to evaluate the accuracy and speed of several commercial tools that are available today. Chapter 1, "Basic Concepts," is for engineers and students who are entering the field of power integrity. The basic concepts are covered in this chapter, which includes a discussion on the fundamentals of power supply noise, its role in the speed of a computer system, the parasitics that produce it, and its effect on jitter and voltage margin for high-speed signal propagation. A power distribution network is best designed in the frequency domain, and the reasons for this are discussed in this chapter. The entire book is based on the parameter called target impedance, which can be used to evaluate the properties of a power distribution network. This parameter, developed in the mid-1990s, provides an elegant method of analysis, which can be used to understand the role of various components in the response of a power distribution network. The target impedance is therefore explained in detail in Chapter 1, with examples that can be reproduced using a circuit simulator such as Simulated Program with Integrated Circuit Emphasis (Spice). The concept of target impedance is used to promote better understanding of the placement of decoupling capacitors. The components of a power distribution network consist of several voltage regulator modules, decoupling capacitors, package and board interconnections, planes, and on-chip interconnections, each of which are explained in this chapter. Planes represent a very critical part of modern power distribution networks. Their frequency behavior can either reduce power supply noise or increase it by a large amount. Hence, a fundamental understanding of plane behavior and its effect on advanced power distribution networks is necessary. The entire book is centered around planes from both a modeling and design standpoint. The fundamental behavior of planes is covered in Chapter 1, with a focus on standing waves, their frequency of occurrence, capacitive and inductive behavior, and use of decoupling capacitors to minimize their effect. The interaction between components of a power distribution is as important as the components themselves. For example, a surface-mount device (SMD) capacitor can interact with the via inductance, causing the self-resonance frequency to shift to a lower frequency; the chip can interact with the package, causing an antiresonance; or the power supply noise can couple into a signal line, causing excessive jitter. The basics associated with such phenomena are covered in Chapter 1. Finally, a methodology is presented that centers on frequency domain analysis initially followed by time domain analysis. The authors believe that this is the optimum way for analyzing and designing advanced power distribution networks. A power distribution network containing suitably designed planes, signals well referenced to planes, and decoupling capacitors appropriately placed on planes will always result in minimum power supply noise. Planes are therefore the focus of Chapter 2, "Modeling of Planes," which covers the various methods available for plane modeling. Some of these methods are used by commercial tools today. This chapter, which requires some background in numerical modeling, provides a survey of modeling methods along with examples that are useful to a designer and can be used to evaluate commercial tools for accuracy and speed. The in-depth numerical formulations can be reproduced in MATLAB and hence are useful to both students and application engineers who are interested in power integrity modeling. Since Maxwell's equations have been converted into circuit representations, we believe that the numerical formulations in this chapter are easier to understand. The modeling methods are separated into lumped element modeling and distributed modeling methods, each covered in detail. The chapter starts with modeling a plane pair and then explains modeling of multilayered planes. The coupling effects in multilayered planes, which include field penetration concepts, aperture coupling, and wraparound currents, are discussed, and the plane modeling methods are compared from a qualitative standpoint. This comparison, along with the rest of the chapter, allows an engineer to benchmark commercial tools. Signals from the output of a driver are propagated on signal line interconnections. However, the driver requires voltage and current to function, and these are supplied by the power distribution network. The signal and power interconnections therefore have to be coupled, with noise on one producing noise on the other. Hence, managing both signal and power integrity requires an understanding of the coupling mechanism between the signal lines and planes. Chapter 3, "Simultaneous Switching Noise," requires little understanding of numerical methods. The entire chapter is based on circuit-level implementations using a concept called modal decomposition , which allows the separation of signal lines from the power distribution network so that each can be analyzed separately and later combined for analysis. Simple Spice models can be used to capture modal decomposition using coupling coefficients and controlled current or voltage sources. The important concept to understand in this chapter is the role of return currents--a concept that every power integrity engineer must understand for minimizing noise. Chapter 4, "Time-Domain Simulation Methods," describes methods for converting a frequency response into a Spice subcircuit. Also called macromodeling , this is a new area of time-domain simulation that is ripe for research. We include this chapter in the book because a few commercial electronic design automation (EDA) vendors have started developing tools in this area. The purpose of Chapter 4 is to enable an engineer or student to better understand the issues involved. The early part of the chapter is easy to follow; it requires some mathematics background and is therefore targeted at designers who use commercial tools. Several examples illustrate simple concepts that can be reproduced using MATLAB. The latter part of the chapter is intense and is mainly intended for people working in the numerical modeling area. The purpose of this chapter is to provide an introduction to the issues involved and possible solutions. In Chapter 5, "Applications," all of the issues discussed in Chapters 1 to 4 are linked to real-world examples. Several examples from companies such as Sun Microsystems, IBM, Oak Mitsui, National Semiconductor, Cisco, DuPont, Panasonic, and Rambus are provided. These applications cover both design and modeling aspects of power integrity. Each example was chosen carefully to ensure that a specific aspect of power integrity is addressed. The best part of the book is that it reproduces some of the examples using the software provided. We hope that through this software, some of the subtle effects related to power integrity, which are only discussed in research papers, can be reproduced and appreciated by a larger community. ---Madhavan Swaminathan (M. S.) ---A. Ege Engin (A. E. E.) Excerpted from Power Integrity Modeling and Design for Semiconductors and Systems by Madhavan Swaminathan, A. Ege Engin All rights reserved by the original copyright owners. Excerpts are provided for display purposes only and may not be reproduced, reprinted or distributed without the written permission of the publisher.Table of Contents
Preface | p. xiii |
Acknowledgments | p. xvii |
About the Authors | p. xxi |
Chapter 1 Basic Concepts | p. 1 |
1.1 Introduction | p. 1 |
1.1.1 Functioning of Transistors | p. 1 |
1.1.2 What Are the Problems with Power Delivery? | p. 4 |
1.1.3 Importance of Power Delivery in Microprocessors and ICs | p. 5 |
1.1.4 Power Delivery Network | p. 6 |
1.1.5 Transients on the Power Supply | p. 8 |
1.2 Simple Relationships for Power Delivery | p. 10 |
1.2.1 Core Circuits | p. 10 |
1.2.2 I/O Circuits | p. 14 |
1.2.3 Delay Due to SSN | p. 15 |
1.2.4 Timing and Voltage Margin Due to SSN | p. 16 |
1.2.5 Relationship between Capacitor and Current | p. 17 |
1.3 Design of PDNs | p. 17 |
1.3.1 Target Impedance | p. 20 |
1.3.2 Impedance and Noise Voltage | p. 22 |
1.4 Components of a PDN | p. 24 |
1.4.1 Voltage Regulator | p. 24 |
1.4.2 Bypass or Decoupling Capacitors | p. 28 |
1.4.3 Package and Board Planes | p. 37 |
1.4.4 On-Chip Power Distribution | p. 42 |
1.4.5 PDN with Components | p. 45 |
1.5 Analysis of PDNs | p. 45 |
1.5.1 Single-Node Analysis | p. 48 |
1.5.2 Distributed Analysis | p. 55 |
1.6 Chip-Package Antiresonance: An Example | p. 61 |
1.7 High-Frequency Measurements | p. 65 |
1.7.1 Measurement of Impedance | p. 66 |
1.7.2 Measurement of Self-Impedance | p. 68 |
1.7.3 Measurement of Transfer Impedance | p. 70 |
1.7.4 Measurement of Impedance by Completely Eliminating Probe Inductance | p. 70 |
1.8 Signal Lines Referenced to Planes | p. 71 |
1.8.1 Signal Lines as Transmission Lines | p. 72 |
1.8.2 Relationship between Transmission-Line Parameters and SSN | p. 74 |
1.8.3 Relationship between SSN and Return Path Discontinuities | p. 75 |
1.9 PDN Modeling Methodology | p. 77 |
1.10 Summary | p. 79 |
Chapter 2 Modeling of Planes | p. 83 |
2.1 Introduction | p. 83 |
2.2 Behavior of Planes | p. 84 |
2.2.1 Frequency Domain | p. 84 |
2.2.2 Time Domain | p. 86 |
2.2.3 Two-Dimensional Planes | p. 88 |
2.3 Lumped Modeling Using Partial Inductances | p. 89 |
2.3.1 Extracting the Inductance and Resistance Matrices | p. 90 |
2.4 Distributed Circuit-Based Approaches | p. 94 |
2.4.1 Modeling Using Transmission Lines | p. 94 |
2.4.2 Transmission Matrix Method (TMM) | p. 97 |
2.4.3 Frequency-Dependent Behavior of Unit-Cell Elements | p. 104 |
2.4.4 Modeling of Gaps in Planes | p. 113 |
2.5 Discretization-Based Plane Models | p. 117 |
2.5.1 Finite-Difference Method | p. 117 |
2.5.2 Finite-Difference Time-Domain Method | p. 128 |
2.5.3 Finite-Element Method | p. 132 |
2.6 Analytical Methods | p. 133 |
2.6.1 Cavity Resonator Method | p. 133 |
2.6.2 Network Representation of the Cavity Resonator Model | p. 135 |
2.7 Multiple Plane Pairs | p. 138 |
2.7.1 Coupling through the Vias | p. 141 |
2.7.2 Coupling through the Conductors | p. 154 |
2.7.3 Coupling through the Apertures | p. 158 |
2.8 Summary | p. 169 |
Chapter 3 Simultaneous Switching Noise | p. 175 |
3.1 Introduction | p. 175 |
3.1.1 Methods for Modeling SSN | p. 175 |
3.2 Simple Models | p. 177 |
3.2.1 Modeling of Output Buffers | p. 180 |
3.3 Modeling of Transmission Lines and Planes | p. 185 |
3.3.1 Microstrip Configuration | p. 186 |
3.3.2 Stripline Configuration | p. 189 |
3.3.3 Conductor-Backed Coplanar Waveguide Configuration | p. 205 |
3.3.4 Summary of Modal Decomposition Methods | p. 207 |
3.4 Application of Models in Time-Domain Analysis | p. 209 |
3.4.1 Plane Bounce from Return Currents | p. 209 |
3.4.2 Microstrip-to-Microstrip Via Transition | p. 217 |
3.4.3 Split Planes | p. 222 |
3.5 Application of Models in Frequency-Domain Analysis | p. 226 |
3.5.1 Stripline between a Power and a Ground Plane | p. 226 |
3.5.2 Microstrip-to-Stripline Via Transition | p. 228 |
3.5.3 Reduction of Noise Coupling Using Thin Dielectrics | p. 231 |
3.6 Extension of M-FDM to Incorporate Transmission Lines | p. 233 |
3.6.1 Analysis of a Complex Board Design | p. 236 |
3.7 Summary | p. 239 |
Chapter 4 Time-Domain Simulation Methods | p. 243 |
4.1 Introduction | p. 243 |
4.2 Rational Function Method | p. 244 |
4.2.1 Basic Theory | p. 244 |
4.2.2 Interpolation Schemes | p. 246 |
4.2.3 Properties of Rational Functions | p. 252 |
4.2.4 Passivity Enforcement | p. 257 |
4.2.5 Integration in a Circuit Solver | p. 283 |
4.2.6 Disadvantages | p. 291 |
4.3 Signal Flow Graphs | p. 295 |
4.3.1 Causality | p. 296 |
4.3.2 Transfer-Function Causality | p. 296 |
4.3.3 Minimum Phase | p. 296 |
4.3.4 Delay Extraction from Frequency Response | p. 300 |
4.3.5 Causal Signal Flow Graphs | p. 302 |
4.3.6 Computational Aspects in SFG | p. 303 |
4.3.7 Fast Convolution Methods | p. 307 |
4.3.8 Cosimulation of Signal and Power Using SFGs | p. 312 |
4.4 Modified Nodal Analysis (MNA) | p. 317 |
4.4.1 What Is MNA? | p. 317 |
4.4.2 Frequency Domain | p. 318 |
4.4.3 Time Domain | p. 320 |
4.4.4 MNA Formulation with S-Parameters | p. 322 |
4.5 Summary | p. 327 |
Chapter 5 Applications | p. 333 |
5.1 Introduction | p. 333 |
5.2 High-Speed Servers | p. 334 |
5.2.1 Core PDN Noise | p. 336 |
5.2.2 I/O PDN Noise | p. 345 |
5.2.3 Summary | p. 349 |
5.3 High-Speed Differential Signaling | p. 349 |
5.3.1 Test Vehicle Description | p. 350 |
5.3.2 Plane Modeling | p. 352 |
5.3.3 Modeling of Master and Slave Islands | p. 358 |
5.3.4 Rational Function Modeling | p. 361 |
5.3.5 Modal Decomposition and Noise Simulation | p. 361 |
5.3.6 Summary | p. 364 |
5.4 Analysis of IC Packages | p. 365 |
5.4.1 Simulation of a Multilayered Package Using M-FDM | p. 366 |
5.4.2 Causal Simulation of HyperBGA Package | p. 368 |
5.4.3 Summary | p. 372 |
5.5 Extraction of Dielectric Constant and Loss Tangent | p. 372 |
5.5.1 Problem Definition | p. 373 |
5.5.2 Corner-to-Corner Plane-Probing Method | p. 378 |
5.5.3 Causal Model Development | p. 386 |
5.5.4 Summary | p. 391 |
5.6 Embedded Decoupling Capacitors | p. 392 |
5.6.1 Embedded Individual Thin- or Thick-Film Capacitors | p. 394 |
5.6.2 Why Embed Individual Capacitors | p. 395 |
5.6.3 Design of an Embedded Thick-Film Capacitor Array | p. 395 |
5.6.4 Integration of Embedded Capacitors into IBM Package | p. 400 |
5.6.5 Embedded Planar Capacitors | p. 404 |
5.6.6 Summary | p. 415 |
5.7 Electromagnetic Bandgap (EBG) Structures | p. 415 |
5.7.1 Basic Theory | p. 416 |
5.7.2 Response of EBG Structures | p. 417 |
5.7.3 Dispersion-Diagram Analysis | p. 420 |
5.7.4 Modification of M-FDM Using Fringe and Gap Fields | p. 424 |
5.7.5 Scalable Design of EBG Structures for Power Plane Isolation | p. 430 |
5.7.6 Digital-RF Integration | p. 434 |
5.7.7 ADC Load-Board Design | p. 436 |
5.7.8 Issues with EBG Structures for Digital Systems | p. 439 |
5.7.9 Summary | p. 442 |
5.8 Future Challenges | p. 443 |
Appendix A p. 451 | |
A.1 Multiport Networks | p. 451 |
A.2 Matrix Representation of Transmission Lines | p. 453 |
A.3 Spectrum of Digital Signals | p. 454 |
Appendix B Software list | p. 459 |
Index | p. 461 |