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3. 
Cover image for Nanometer technology designs : high quality delay tests
4. 
Cover image for Defect-oriented testing for nano-metric CMOS VLSI circuits
6. 
Cover image for VLSI test principles and architectures : design for testability
7. 
Cover image for An experimental approach to CDMA and interference mitigation : from system architecture to hardware testing through VLSI design
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Cover image for Verification by error modeling : using testing techniques in hardware verification
10. 
Cover image for Essentials of electronic  testing for digital, memory and mixed - signal VLSI circuits