Title:
MMIC design : Ga As FETs and HEMTS
Personal Author:
Publication Information:
Boston, Mass : Artech House, 1989
ISBN:
9780890063149
Available:*
Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
---|---|---|---|---|---|
Searching... | 30000001359508 | TK7876 L32 1989 | Open Access Book | Book | Searching... |
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Summary
Summary
Detailed information on the principles of integrated design required for successful fabrication of MMIC chips at a reasonable cost. It emphasizes CAD techniques and the effects of material variation. The device modelling techniques presented demonstrate the simulation of overall MMIC chip behavior a
Table of Contents
Foreword | p. xi |
Acknowledgments | p. xiii |
Notes on nomenclature, acronyms and useful data | p. xv |
List of symbols | p. xvii |
Chapter 1 Introduction | p. 1 |
1.1 Statement of the problem | p. 1 |
1.2 Design approaches | p. 2 |
1.3 A simple example | p. 4 |
1.4 Yield | p. 7 |
1.5 The role of device physics | p. 8 |
Chapter 2 MMIC types and chip functions | p. 11 |
2.1 Scale of IC fabrication | p. 11 |
2.2 Applications | p. 12 |
2.2.1 Civil | p. 12 |
2.2.2 Military | p. 14 |
2.3 Chip functions | p. 15 |
2.4 Example MMICs | p. 17 |
Chapter 3 Overview of passive elements | p. 29 |
3.1 Introduction | p. 29 |
3.2 Microstripline | p. 30 |
3.3 Inductors | p. 34 |
3.4 Capacitors | p. 41 |
3.5 Resistors | p. 47 |
3.6 The Lange coupler | p. 49 |
3.7 Other components | p. 50 |
3.8 Final remarks | p. 52 |
Chapter 4 PIN and Schottky diodes | p. 55 |
4.1 Introduction | p. 55 |
4.2 Schottky diodes | p. 56 |
4.3 PIN diodes | p. 63 |
4.4 MMIC uses of PIN and Schottky diodes | p. 67 |
Chapter 5 Elementary FET principles | p. 69 |
5.1 Introduction | p. 69 |
5.2 Review of Si JFET operation | p. 70 |
5.3 Current saturation in the GaAs MESFET | p. 77 |
5.4 Mechanism of current saturation--summary | p. 82 |
5.5 Essential enhancements | p. 83 |
5.5.1 Si JFET | p. 83 |
5.5.2 GaAs MESFET | p. 84 |
5.6 Equivalent circuit of the GaAs MESFET | p. 85 |
5.7 Concluding remarks | p. 87 |
Chapter 6 MESFETs | p. 91 |
6.1 Introduction | p. 91 |
6.2 Brief outline of structure | p. 91 |
6.3 Equivalent circuit--physical basis | p. 95 |
6.3.1 Signal delay | p. 95 |
6.3.2 Charge storage | p. 99 |
6.3.3 Current modulation | p. 109 |
6.3.4 Transconductance delay | p. 110 |
6.4 Intrinsic equivalent circuit | p. 112 |
6.4.1 Configuration | p. 112 |
6.4.2 Voltage dependence of the space-charge layer extension, X | p. 116 |
6.4.3 Gate strip inductance, [script l][subscript g] | p. 121 |
6.4.4 Channel, or intrinsic, resistance, R[subscript i] | p. 121 |
6.4.5 Channel current, I[subscript CH] | p. 121 |
6.4.6 Intrinsic transconductance, g[subscript m0] | p. 122 |
6.4.7 Gate-channel capacitance, C[subscript gc] | p. 123 |
6.4.8 Gate-drain capacitance, C[subscript gd] | p. 123 |
6.4.9 Transconductance delay, [tau][subscript gm] | p. 124 |
6.5 Implications for FET design and usage | p. 124 |
6.6 Output conductance and other microwave effects of substrate current | p. 125 |
6.7 Effect of surface charge, non-uniform doping and gate recess depth | p. 135 |
6.8 Series parasitic resistances R[subscript s] and R[subscript d] and effect on equivalent circuit | p. 138 |
6.8.1 Source resistance, R[subscript s] | p. 139 |
6.8.2 Drain resistances, R[subscript D] and R[subscript d] | p. 142 |
6.9 Gate resistance | p. 145 |
6.10 Geometric capacitance | p. 146 |
6.11 Via-hole inductance | p. 155 |
6.12 GaAs FET noise | p. 156 |
6.13 Power MMICs | p. 163 |
Chapter 7 High electron mobility transistors | p. 189 |
7.1 Introduction | p. 189 |
7.2 Energy band line-up | p. 190 |
7.3 Physical basis and structure | p. 192 |
7.4 Practical HEMT structures | p. 196 |
7.5 Principal equivalent circuit elements | p. 198 |
7.6 HEMT noise | p. 201 |
7.7 Prospects for HEMT integration | p. 202 |
Chapter 8 Reverse modeling GaAs MESFETs and HEMTs | p. 205 |
8.1 Introduction | p. 205 |
8.2 Reverse modeling for gate length | p. 205 |
8.3 Errors in eqns (8.2) and (8.6) | p. 211 |
8.4 Extension to HEMTs | p. 211 |
8.5 General comments | p. 215 |
8.6 Reverse modeling for channel doping | p. 218 |
8.7 Conclusion | p. 219 |
Chapter 9 Design limits | p. 221 |
9.1 Introduction | p. 221 |
9.2 Limits to small-signal behavior | p. 222 |
9.2.1 Gain, frequency and voltage, and gate length | p. 222 |
9.2.2 Effect of gatewidth, Z[subscript G] | p. 225 |
9.2.3 Input and output reflection coefficient | p. 232 |
9.2.4 Maximum Tunable Gain (MTG), MAG, MSG and MUG | p. 242 |
9.3 Limits to large-signal (power) behavior | p. 248 |
Chapter 10 FETs in amplifiers | p. 259 |
10.1 Introduction | p. 259 |
10.2 Amplifier topologies and design principles | p. 261 |
10.2.1 Reactively matched amplifiers | p. 263 |
10.2.2 Design of a two-element matching or gain slope compensation network | p. 268 |
10.2.3 Lossy matched amplifiers | p. 277 |
10.2.4 Feedback amplifiers | p. 279 |
10.2.5 Distributed amplifiers | p. 287 |
10.2.6 The matrix amplifier | p. 300 |
10.2.7 Balanced amplifiers | p. 303 |
10.3 First trial device synthesis | p. 305 |
10.4 FET synthesis by reverse modeling | p. 310 |
10.5 FET synthesis for distributed power amplifiers | p. 312 |
10.5.1 Power-impedance considerations | p. 313 |
10.5.2 Frequency considerations | p. 315 |
10.5.3 FET synthesis--example | p. 316 |
10.6 Final remarks | p. 321 |
Chapter 11 Computer-aided design | p. 325 |
11.1 Introduction | p. 325 |
11.2 Sensitivity analysis--basis | p. 327 |
11.3 Application of the Monte Carlo method to yield forecasting | p. 337 |
11.4 Uses of yield forecasting | p. 343 |
11.5 FET centering | p. 344 |
11.6 Longer-term developments | p. 346 |
Chapter 12 Future developments | p. 357 |
Index | p. 365 |