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Cover image for Electronic packaging and interconnection handbook
Title:
Electronic packaging and interconnection handbook
Edition:
3rd ed.
Publication Information:
New York : McGraw-Hill, 2000
ISBN:
9780071347457
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30000004759308 TK7870.15 H37 2000 Open Access Book Book
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Table of Contents

Prefacep. xi
Electronic Packaging Definedp. xiii
Contributorsp. xiv
Part 1 Fundamental Technologies
Chapter 1. Materials for Electronic Packaging
Polymers for Electronic Packaging
1.1 Introductionp. 1.1
1.2 Future Electronic Packaging System Needsp. 1.2
1.3 Recent Advancements in Polymeric Materials for Electronic Packagingp. 1.2
1.4 Polymeric Materials For Microelectronicsp. 1.3
1.5 Conclusions and Future Developmentsp. 1.15
Bibliographyp. 1.15
Flip Chip Technology: Materials and Processes for the Next Generation of High-Performance Electronics
1.6 Basicsp. 1.22
1.7 Under-Bump Metallizationp. 1.24
1.8 Bumping Materialsp. 1.27
1.9 Bumping Processesp. 1.30
1.10 Joining Materials and Agentsp. 1.34
1.11 The Assembly Processp. 1.38
1.12 Encapsulation/Underfillp. 1.41
1.13 Substrates for Flip Chipsp. 1.46
1.14 Features and Benefitsp. 1.48
1.15 Limitations and Issuesp. 1.49
1.16 Performance and Reliabilityp. 1.51
1.17 Applicationsp. 1.51
1.18 Summary and Conclusionsp. 1.53
Referencesp. 1.54
Ceramic Materials
1.19 Introductionp. 1.58
1.20 Classes of Materials Coveredp. 1.65
1.21 Summary--Ceramicsp. 1.93
Referencesp. 1.93
Chapter 2. Thermal Management
2.1 Introductionp. 2.1
2.2 Why Thermal Management?p. 2.2
2.3 Heat Flow Theoryp. 2.5
2.4 The Thermal Designp. 2.35
2.5 Heat Sinksp. 2.36
2.6 Circuit Card Assembly Coolingp. 2.50
2.7 High heat-load coolingp. 2.57
2.8 Special cooling devicesp. 2.66
2.9 Computer-Based Thermal Analysisp. 2.75
2.10 Thermal Measurementsp. 2.79
Referencesp. 2.90
Chapter 3. Thermal and Mechanical Stress Behavior in Electronic Packaging
3.1 Introductionp. 3.1
3.2 Stress Generation and Fatiguep. 3.2
3.3 Stress Environmentsp. 3.5
3.4 Material Mechanical Propertiesp. 3.8
3.5 Soft Solder Fatiguep. 3.12
3.6 Mechanical and Thermomechanical Modelsp. 3.13
3.7 Modified Coffin-Manson Equationsp. 3.18
3.8 Miner's Rulep. 3.20
3.9 FEM Package Representationp. 3.22
3.10 Thermal Analysis Using FEMp. 3.24
3.11 Total Inelastic Strain Energyp. 3.25
3.12 Crack Growth Theoryp. 3.25
3.13 Temperature Dependence of Propertiesp. 3.27
3.14 Packaging Fatiguep. 3.28
3.15 Die Cracking and Delaminationp. 3.28
3.16 Flip Chipsp. 3.31
3.17 Ball Grid Arraysp. 3.36
3.18 Chip on Boardp. 3.37
3.19 Level-Two Packaging--Pin-in-Holep. 3.39
3.20 Leadless and Leaded Quad Packagesp. 3.40
3.21 FEM Stress Analysis of Temperature-Cycled LCCC Solder Jointsp. 3.42
3.22 Leaded Chip Carriers (Quad Flat Packages)p. 3.45
3.23 Summaryp. 3.46
Referencesp. 3.47
Chapter 4. Connector and Interconnection Technology
4.1 Connector Overviewp. 4.1
4.2 The Contact Interfacep. 4.6
4.3 The Contact Finishp. 4.10
4.4 Contact Springsp. 4.17
4.5 Connector Housingsp. 4.21
4.6 Separable Connectionsp. 4.27
4.7 Permanent Connectionsp. 4.33
4.8 Connector Applicationsp. 4.49
4.9 Connector Typesp. 4.55
4.10 Connector Testingp. 4.72
Referencesp. 4.80
Chapter 5. Wiring and Cabling
5.1 Introductionp. 5.1
5.2 Cabling Typesp. 5.2
5.3 Basic Constructionp. 5.4
5.4 Connector Characteristicsp. 5.45
5.5 Electromagnetic Interference and Shieldingp. 5.47
Referencesp. 5.55
Chapter 6. Solder Technologies for Electronic Packaging and Assembly
6.1 Introductionp. 6.1
6.2 Solder Materialsp. 6.6
6.3 Solder Pastep. 6.23
6.4 Soldering Methodologyp. 6.31
6.5 Solderabilityp. 6.50
6.6 Cleaningp. 6.52
6.7 Fine-Pitch Applicationp. 6.53
6.8 Soldering-Related Issuesp. 6.57
6.9 Solder-Joint Appearance and Microstructurep. 6.66
6.10 Solder-Joint Integrityp. 6.71
6.11 Lead-Free Soldersp. 6.78
Referencesp. 6.82
Part 2 Interconnection Technologies
Chapter 7. Packaging and Interconnection of Integrated Circuits
7.1 Introductionp. 7.1
7.2 Conventional Package Technologiesp. 7.20
7.3 Advanced Package Technologiesp. 7.45
7.4 Comparison of Technologiesp. 7.59
7.5 Package Familiesp. 7.61
7.6 Package Design Considerationsp. 7.67
7.7 Package IC Assembly Processesp. 7.77
7.8 Outsourcing--Subcontract Assemblyp. 7.91
7.9 Package to Second-Level Interconnectionp. 7.94
7.10 Summary and Future Trendsp. 7.95
Referencesp. 7.97
Chapter 8. Surface Mount Technologies
8.1 Introductionp. 8.1
8.2 The Challenges of SMTp. 8.2
8.3 Engineering Skillsp. 8.8
8.4 Electronics Packaging Familiesp. 8.12
8.5 SMT Design for Manufacturep. 8.26
8.6 Materials Impact on Processp. 8.34
8.7 Process Guidelines for SMT Manufacturingp. 8.41
8.8 Inspection and Quality Assurancep. 8.72
8.9 Reliabilityp. 8.78
Referencesp. 8.87
Chapter 9. The Hybrid Microelectronics and Multichip Module Technologies
9.1 Introductionp. 9.1
9.2 Ceramic Substrates for Microelectronic Applicationsp. 9.2
9.3 Composite Materialsp. 9.9
9.4 Thick Film Technologyp. 9.11
9.5 Cermet Thick Film Conductor Materialsp. 9.18
9.6 Thick Film Resistor Materialsp. 9.20
9.7 Thick Film Dielectric Materialsp. 9.28
9.8 Overglaze Materialsp. 9.29
9.9 Conclusionsp. 9.30
9.10 Thin Film Technologyp. 9.30
9.11 Thin Film Materialsp. 9.35
9.12 Comparison of Thick and Thin Filmp. 9.37
9.13 Copper Metallization Technologiesp. 9.37
9.14 Summary of Substrate Metallization Technologiesp. 9.46
9.15 Resistor Trimmingp. 9.46
9.16 Assembly of Hybrid Circuitsp. 9.51
9.17 Packagingp. 9.62
9.18 Design of Hybrid Circuitsp. 9.68
9.19 Multichip Modulesp. 9.71
Referencesp. 9.75
Chapter 10. Chip Scale Packaging and Direct Chip Attach Technologies
10.1 Introductionp. 10.1
10.2 Background and Historyp. 10.2
10.3 Electronic Interconnection Regimep. 10.5
10.4 Early Minimalist IC Packaging Solutionp. 10.6
10.5 Current Interconnection Trendsp. 10.7
10.6 Important Shared Issuesp. 10.7
10.7 Markets for CSP and DCAp. 10.15
10.8 Direct Chip Attach Technologiesp. 10.19
10.9 Chip scale Packagesp. 10.26
10.10 Testing CSPs and Direct Attach Assembliesp. 10.48
10.11 Summaryp. 10.58
Referencesp. 10.58
Chapter 11. Rigid and Flexible Printed Wiring Boards and Microvia Technology
11.1 Introductionp. 11.1
11.2 Printed Circuit Board System Typesp. 11.2
11.3 Printed Circuit Board Materialsp. 11.6
11.4 Design Considerationsp. 11.19
11.5 Manufacturing Considerationsp. 11.54
11.6 Microviasp. 11.65
11.7 Industry Standardsp. 11.84
Suggested Readingp. 11.86
Acknowledgmentp. 11.88
Part 3 System Packaging Technologies
Chapter 12. Packaging of High-Speed and Microwave Electronic Systems
12.1 Introductionp. 12.1
12.2 Types of Circuit Media for Modern Microwave Packagingp. 12.4
12.3 Limitations of Microwave Integrated Circuitsp. 12.9
12.4 Technology of Microwave Integrated Circuitsp. 12.13
12.5 Planar Waveguidesp. 12.21
12.6 Lumped-Element Circuits for Microwave Packagesp. 12.29
12.7 High-Speed Digital Packagingp. 12.34
12.8 Electrical Design Inputsp. 12.37
12.9 Netlist Analysisp. 12.40
12.10 Design Restrictionsp. 12.42
12.11 PWB Layout Considerationsp. 12.52
12.12 Preferred Redesign Optionsp. 12.54
12.13 CAD Interfacep. 12.57
Referencesp. 12.59
Chapter 13. Packaging of High-Voltage Systems
13.1 Introductionp. 13.1
13.2 Properties of Insulating Materialsp. 13.1
13.3 Field Stress and Configurationsp. 13.21
13.4 Aerospace Design Considerationsp. 13.29
13.5 Design and Manufacturing Guidelinesp. 13.37
13.6 Testsp. 13.48
13.7 Problems and Suggested Solutionsp. 13.53
13.8 Conclusionsp. 13.54
Referencesp. 13.55
Chapter 14. Electrical Characterization and Modeling of IC Packaging
14.1 Introductionp. 14.1
14.2 Package Electrical Analysisp. 14.2
14.3 Package Modelingp. 14.23
14.4 Package Modeling Programp. 14.34
14.5 Verification Method for Modeling Programsp. 14.41
14.6 Summaryp. 14.52
Referencesp. 14.53
Appendix Electronic Packaging Terms and Abbreviationsp. 1
Indexp. 1
About the Editorp. 1
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