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Cover image for Digital principles and logic design
Title:
Digital principles and logic design
Personal Author:
Publication Information:
Hingham, MA : Infinity Science Press, 2007
Physical Description:
1v + 1 CD-ROM
ISBN:
9781934015032
General Note:
Accompanied by compat disc : CP 12012
Added Author:

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30000010159371 TK454 S33 2007 Open Access Book Book
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30000003485715 TK454 S33 2007 Open Access Book Book
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Summary

Summary

This text/reference provides students and practicing engineers with an introduction to the classical methods of designing electrical circuits, but incorporates modern logic design techniques used in the latest microprocessors, microcontrollers, microcomputers, and various LSI components. The book provides a review of the classical methods e.g., the basic concepts of Boolean algebra, combinational logic and sequential logic procedures, before engaging in the practical design approach and the use of computer-aided tools. The book is enriched with numerous examples (and their solutions), over 500 illustrations, and includes a CD-ROM with simulations, additional figures, and third party software to illustrate the concepts discussed in the book.


Author Notes

Arijit Saha is an instructor of electronics and communication engineering at JIS College of Engineering
Nilotpal Manna is a senior faculty member in electronics engineering at JIS College of Engineering


Table of Contents

Prefacep. xiii
1 Data and Number Systemsp. 1
1.1 Introductionp. 1
1.2 Number Systemsp. 2
1.3 Conversion between Number Systemsp. 2
1.4 Complementsp. 10
1.5 Binary Arithmeticp. 13
1.6 1's And 2's Complement Arithmeticp. 17
1.7 Signed Binary Numbersp. 19
1.8 7's And 8's Complement Arithmeticp. 21
1.9 9's And 10's Complement Arithmeticp. 23
1.10 15's And 16's Complement Arithmeticp. 25
1.11 BCD Additionp. 27
1.12 BCD Subtractionp. 28
Review Questionsp. 30
2 Codes and Their Conversionsp. 31
2.1 Introductionp. 31
2.2 Codesp. 31
2.3 Solved Problemsp. 44
Review Questionsp. 49
3 Boolean Algebra and Logic Gatesp. 51
3.1 Introductionp. 51
3.2 Basic Definitionsp. 51
3.3 Definition of Boolean Algebrap. 52
3.4 Two-valued Boolean Algebrap. 54
3.5 Basic Properties And Theorems of Boolean Algebrap. 55
3.6 Venn Diagramp. 57
3.7 Boolean Functionsp. 58
3.8 Simplification of Boolean Expressionsp. 59
3.9 Canonical And Standard Formsp. 60
3.10 Other Logic Operatorsp. 67
3.11 Digital Logic Gatesp. 67
3.12 Positive And Negative Logicp. 83
3.13 Concluding Remarksp. 84
Review Questionsp. 85
4 Simplification and Minimization of Boolean Functionsp. 89
4.1 Introductionp. 89
4.2 Two-variable Karnaugh Mapsp. 89
4.3 Three-variable Karnaugh Mapsp. 90
4.4 Four-variable Karnaugh Mapsp. 93
4.5 Five-variable Karnaugh Mapsp. 99
4.6 Six-variable Karnaugh Mapsp. 100
4.7 Don't-care Combinationsp. 102
4.8 The Tabulation Methodp. 103
4.9 More Examplesp. 106
4.10 Variable-entered Karnaugh Mapsp. 113
4.11 Concluding Remarksp. 123
Review Questionsp. 123
5 Combinational Logic Circuitsp. 125
5.1 Introductionp. 125
5.2 Design Procedurep. 126
5.3 Addersp. 126
5.4 Subtractorsp. 129
5.5 Code Conversionp. 132
5.6 Parity Generator And Checkerp. 141
5.7 Some Examples of Combinational Logic Circuitsp. 143
5.8 Combinational Logic with MSI And LSIp. 156
5.9 Four-bit Binary Parallel Adderp. 157
5.10 Magnitude Comparatorp. 167
5.11 Decodersp. 168
5.12 Encodersp. 174
5.13 Multiplexers or Data Selectorsp. 175
5.14 Demultiplexers or Data Distributorsp. 188
5.15 Concluding Remarksp. 190
Review Questionsp. 190
6 Programmable Logic Devicesp. 193
6.1 Introductionp. 193
6.2 PLD Notationp. 195
6.3 Read Only Memory (ROM)p. 195
6.4 Programmable Logic Array (PLA)p. 202
6.5 Programmable Array Logic (PAL) Devicesp. 208
6.6 Registered PAL Devicesp. 210
6.7 Configurable PAL Devicesp. 211
6.8 Generic Array Logic Devicesp. 211
6.9 Field-Programmable Gate Array (FPGA)p. 211
6.10 Concluding Remarksp. 212
Review Questionsp. 212
7 Sequential Logic Circuitsp. 215
7.1 Introductionp. 215
7.2 Flip-flopsp. 216
7.3 Types of Flip-flopsp. 218
7.4 Clocked S-R Flip-flopp. 221
7.5 Clocked D Flip-flopp. 225
7.6 J-K Flip-flopp. 228
7.7 T Flip-flopp. 233
7.8 Toggling Mode of S-R and D Flip-flopsp. 235
7.9 Triggering of Flip-flopsp. 235
7.10 Excitation Table of a Flip-flopp. 237
7.11 Interconversion of Flip-flopsp. 237
7.12 Sequential Circuit Modelp. 248
7.13 Classification of Sequential Circuitsp. 248
7.14 Analysis of Sequential Circuitsp. 250
7.15 Design Procedure of Sequential Circuitsp. 254
Review Questionsp. 260
8 Registersp. 263
8.1 Introductionp. 263
8.2 Shift Registerp. 263
8.3 Serial-in-Serial-out Shift Registerp. 264
8.4 Serial-in-Parallel-out Registerp. 269
8.5 Parallel-in-Serial-out Registerp. 270
8.6 Parallel-in-Parallel-out Registerp. 272
8.7 Universal Registerp. 274
8.8 Shift Register Countersp. 276
8.9 Sequence Generatorp. 279
8.10 Serial Additionp. 283
8.11 Binary Dividerp. 284
Review Questionsp. 289
9 Countersp. 291
9.1 Introductionp. 291
9.2 Asynchronous (Serial or Ripple) Countersp. 292
9.3 Asynchronous Counter ICsp. 302
9.4 Synchronous (Parallel) Countersp. 309
9.5 Synchronous Down-Counterp. 311
9.6 Synchronous Up-Down Counterp. 312
9.7 Design Procedure of Synchronous Counterp. 313
9.8 Synchronous/Asynchronous Counterp. 325
9.9 Presettable Counterp. 326
9.10 Synchronous Counter ICsp. 327
9.11 Counter Applicationsp. 335
9.12 Hazards in Digital Circuitsp. 338
Review Questionsp. 344
10 A/D and D/A Conversionp. 345
10.1 Introductionp. 345
10.2 Digital-to-Analog Converters (DAC)p. 345
10.3 Specification of D/A Convertersp. 355
10.4 An Example of a D/A Converterp. 357
10.5 Analog-to-Digital Convertersp. 360
10.6 Specification of an A/D Converterp. 371
10.7 An Example of an A/D Converter ICp. 372
10.8 Concluding Remarksp. 374
Review Questionsp. 374
11 Logic Familyp. 377
11.1 Introductionp. 377
11.2 Characteristics of Digital ICp. 379
11.3 Bipolar Transistor Characteristicsp. 382
11.4 Resistor-Transistor Logic (RTL)p. 385
11.5 Diode Transistor Logic (DTL)p. 387
11.6 Transistor Transistor Logic (TTL)p. 389
11.7 Emitter-Coupled Logic (ECL)p. 407
11.8 Integrated-Injection Logic (I[subscript 2]L)p. 410
11.9 Metal Oxide Semiconductor (MOS)p. 412
11.10 Comparison of Different Logic Familiesp. 420
11.11 Interfacingp. 421
11.12 Some Examplesp. 424
Review Questionsp. 427
Appendix 1 Alternate Gate Symbolsp. 431
Appendix 2 74 Series Integrated Circuitsp. 433
Appendix 3 Pin Configuration of 74 Series Integrated Circuitsp. 439
Appendix 4 4000 Series Integrated Circuitsp. 459
Appendix 5 Pin Configuration of 4000 Series Integrated Circuitsp. 465
Appendix 6 About the CD-ROMp. 481
Glossaryp. 483
Bibliographyp. 487
Indexp. 489
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