Design of low-voltage CMOS switched-opamp switched-capacitor systems

In Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems, the emphasis is put on the design and development of advanced switched-opamp architectures and techniques for low-voltage low-power switched-capacitor (SC) systems. Specifically, the book presents a novel multi-phase switched-opamp technique together with new system architectures that are critical in improving significantly the performance of switched-capacitor systems at low supply voltages:
*A generic fast-settling double-sampling SC biquadratic filter architecture is proposed to achieve high-speed operation for SC circuits.
*A low-voltage double-sampling (DS) finite-gain-compensation (FGC) technique is employed to realize high-resolution SD modulator using only low-DC-gain opamps to maximize the speed and to reduce power dissipation.
*A family of novel power-efficient SC filters and SD modulators are built based on using only half-delay SC integrators.
*Single-opamp-based SCsystems are designed for ultra-low-power applications.

In addition, on the circuit level, a fast-switching methodology is proposed for the design of the switchable opamps to achieve switching frequency up to 50 MHz at 1V, which is improved by about ten times compared to the prior arts.

Finally, detailed design considerations, architecture choices, and circuit implementation of five chip prototypes are presented to illustrate potential applications of the proposed multi-phase switched-opamp technique to tackle with and to achieve different stringent design corners such as high-speed, high-integration-level and ultra-low-power consumption at supply voltages of 1V or lower in standard CMOS processes.

Table of Contents	p. i
List of Figures	p. v
List of Tables	p. xi
Preface	p. xiii
Acknowledgement	p. xv
Chapter 1 Introduction	p. 1
1.1 Situations of Research	p. 1
1.2 Research Objectives	p. 4
1.3 Outline of this Book	p. 4
Chapter 2 Analysis and Design Considerations of Switched-Opamp Techniques	p. 7
2.1 Introduction	p. 7
2.2 Minimum Supply Voltage for SC Circuits	p. 8
2.3 Low-Voltage Solutions for SC Circuits	p. 9
2.4 Original Switched-Opamp Technique	p. 10
2.5 Multi-Phase Switched-Opamp Technique	p. 12
2.6 Analysis of Parasitic-Sensitive Switched-Capacitor and Switched-Opamp Integrators	p. 16
2.6.1 Analysis of Conventional Parasitic-Insensitive SC Integrators	p. 16
2.6.2 Analysis of Conventional Parasitic-Insensitive Integrators Using Original Switched-Opamp Technique	p. 20
2.6.3 Analysis of Conventional Parasitic-Insensitive Integrators Using Multi-Phase Switched-Opamp Technique	p. 26
2.7 Performance Comparisons of Switched-Capacitor and Switched-Opamp Integrators	p. 35
2.8 Conclusion	p. 38
Chapter 3 System Considerations for Switched-Opamp Circuits	p. 39
3.1 Introduction	p. 39
3.2 Principle of the Double-Sampling Technique	p. 40
3.3 Settling Problems of Opamps in Conventional Double-Sampling SC Architecture	p. 42
3.4 Proposed Fast-Settling Double-Sampled Generic SC Biquadratic Filter	p. 43
3.5 Proposed Half-Delay-SC-Integrator-Based Generic SC Biquadratic Filter	p. 45
3.6 Proposed Half-Delay-SC-Integrator-Based SC Ladder Filter	p. 50
3.7 Proposed Half-Delay-SC-Integrator-Based SC Lowpass [Sigma Delta] Modulator with Noise-Shaping Extension	p. 54
3.8 Conclusion	p. 61
Chapter 4 Circuit Implementation and Layout Considerations for Switched-Opamp Circuits	p. 63
4.1 Introduction	p. 63
4.2 Opamp Design Considerations for Switched-Opamp Circuits	p. 63
4.3 Design Review of Switchable Opamps	p. 66
4.3.1 Design of Switchable Opamp by Switching Bias Current	p. 66
4.3.2 Design of Switchable Opamp by Disconnecting from Power Rails	p. 67
4.3.3 Design of Switchable Opamp by Switching Output Stage	p. 68
4.4 A Proposed Fast-Switching Methodology for the Design of Switchable Opamp	p. 69
4.5 Layout Considerations for Switched-Capacitor Systems	p. 70
4.5.1 Layout Floorplan for Switched-Capacitor Circuits	p. 70
4.5.2 Layout Technique for Matching Capacitors	p. 71
4.5.3 Layout Considerations for Minimizing Switching Noise Effect	p. 72
4.5.4 Layout Considerations for Minimizing Parasitic Capacitive Loading to Opamp	p. 73
4.6 Conclusion	p. 74
Chapter 5 Design of a Switched-Capacitor Pseudo-2-Path Filter Using Multi-Phase Switched-Opamp Technique	p. 75
5.1 Introduction	p. 75
5.2 N-Path and Pseudo-N-Path Filters	p. 76
5.2.1 N-Path Filter	p. 76
5.2.2 Pseudo-N-Path Filter	p. 79
5.3 Z to -Z[superscript -N] Transformation Using RAM-Type SC Pseudo-N-Path Integrator	p. 80
5.4 Design of a 1-V Switched-Opamp SC Pseudo-2-Path Filter	p. 82
5.5 Circuit Implementation	p. 85
5.6 Experimental Results	p. 87
5.7 Conclusion	p. 94
Chapter 6 Design of Low-Power and High-Frequency Switched-Opamp Circuits	p. 95
6.1 Introduction	p. 95
6.2 Bandpass [Sigma Delta] Modulator Topology	p. 96
6.3 Fast-Settling Double-Sampled SC Resonator	p. 97
6.4 1-V Double-Sampling Finite-Gain-Compensation Technique	p. 98
6.5 Realization of DSFGC Bandpass [Sigma Delta] Modulator	p. 102
6.6 Design of Low-Voltage Building Blocks	p. 104
6.6.1 Current-Mirror Operational Amplifier	p. 104
6.6.2 1-V Switchable Current-Mirror Opamp with Dual Time-Multiplexed Output Stages	p. 106
6.6.3 Current-Injected Common-Mode Feedback Circuit	p. 108
6.6.4 1-V Latch-Type Comparator	p. 109
6.6.5 1-V D-Flip-Flop	p. 110
6.7 Experimental Results	p. 111
6.8 Conclusion	p. 116
Chapter 7 Design of Low-Power and High-Level Integrated Switched-Opamp Circuits
7.1 Introduction	p. 117
7.2 System Description	p. 118
7.3 Design of 1-V Switched-Opamp Biquadratic Filter	p. 120
7.4 Design of 1-V Switched-Opamp Ladder Filter	p. 121
7.5 Design of 1-V Switched-Opamp Lowpass [Sigma Delta] Modulator with Noise-Shaping Extension	p. 123
7.6 Quadrature Channels Optimization	p. 124
7.7 Circuits Implementation	p. 126
7.8 Experimental Results	p. 127
7.9 Conclusion	p. 134
Chapter 8 Design of Ultra-Low-Power Single-Switched-Opamp-Based Systems	p. 135
8.1 Introduction	p. 135
8.2 System Considerations	p. 136
8.3 Design of a 0.9-V Sub-[mu]W SC [Sigma Delta] Modulator	p. 137
8.3.1 Single-Opamp-Based [Sigma Delta] Modulator Topology	p. 138
8.3.2 Switchable Opamp Design	p. 139
8.3.3 Dynamic Common-Mode Feedback Circuit	p. 140
8.3.4 1-V Latch-Type Comparator	p. 141
8.3.5 Experimental Results of the SSOP [Sigma Delta] Modulator	p. 142
8.4 Design of a 0.9-V Sub-[mu]W SC Signal Conditioning System	p. 149
8.4.1 Single-Switched-Opamp-Based Realization	p. 151
8.4.2 Switchable Opamp Design	p. 155
8.4.3 Dynamic Common-Mode Feedback Circuit	p. 156
8.4.4 Experimental Results of the SC Signal Conditioning System	p. 157
8.5 Conclusion	p. 163
Chapter 9 Conclusion	p. 165
Appendix A Procedures of Performing Time Domain Analysis of SC Circuits	p. 167
Appendix B Analysis of Finite-Opamp-Gain Effects on Inverting SC Integrators	p. 169
Appendix C Design Procedures of SC Biquadratic Filter	p. 175
Appendix D Design Procedures of SC Ladder Filter	p. 177
References	p. 181
Index	p. 189

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