Schematic capture with MicroSim PSpice : for windows 3.1

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Summary

A supplementary manual designed for use throughout the continuum of freshman/senior-level electronics courses in Engineering and Engineering Technology.

Written as a class demonstration with step-by-step screen captures these manuals show students how to use the Windows versions of the PSpice circuit simulation program from MicroSim with the schematic capture front end, Schematics. Focusing on a wide range of circuits that are studied throughout the engineering/engineering technology curriculum, they feature a collection of examples that show how to create a circuit, how to run the different analyses, and how to obtain the results from those analyses. They include complete software allowing students to take a circuit from conception, to circuit simulation, to schematic documentation, to circuit realization (PC board production). This text contains version 7.1 of the MicroSim PSpice and Schematics software. This is the last version of the software to run under Windows 3.1. For the software version that runs under Windows 95, Windows 98, and Windows NT, see Schematic Capture Using MicroSim PSpice for Windows 95/98/NT .

1. Editing a Basic Schematic	p. 1
1.A. Starting Schematics	p. 1
1.B. Placing Parts	p. 3
1.C. Correcting Mistakes	p. 15
1.D. Changing Attributes	p. 15
1.E. Wiring Components	p. 22
1.F. Correcting Wiring Mistakes	p. 27
1.G. Grounding Your Circuit	p. 28
1.H. Saving Your Schematic	p. 30
1.I. Editing the Title Block	p. 31
1.I.1. Modifying the Title Block in the Current Schematic	p. 31
1.I.2. Permanently Changing the Title Block	p. 34
1.J. Printing Your Schematic	p. 39
2. Introduction to Probe	p. 48
2.A. Plotting Traces	p. 52
2.B. Deleting Traces	p. 58
2.C. Using the Markers to Add Traces	p. 59
2.D. Zooming In and Out	p. 67
2.E. Adding a Second Y-Axis	p. 71
2.F. Adding Plots	p. 74
2.G. Adding a Window	p. 77
2.H. Placing Text on Probe's Screen	p. 81
2.I. Placing Arrows on the Screen	p. 85
2.J. Moving Items on the Screen	p. 87
2.K. Using the Cursors	p. 88
2.L. Labeling Points	p. 94
3. DC Nodal Analysis	p. 96
3.A. Resistive Circuit Nodal Analysis	p. 96
3.B. Nodal Analysis with Dependent Sources	p. 105
3.C. Diode DC Current and Voltage	p. 110
3.D. Finding the Thevenin and Norton Equivalents of a Circuit	p. 114
3.E. Transistor Bias Point Detail	p. 121
3.F. Summary	p. 123
4. DC Sweep	p. 124
4.A. Basic DC Analysis	p. 124
4.B. Diode I-V Characteristic	p. 129
4.B.1. Temperature Sweep -- Diode I-V Characteristic	p. 133
4.C. Parametric Sweep -- Maximum Power Transfer	p. 138
4.D. DC Transfer Curves	p. 144
4.D.1. Zener Clipping Circuit	p. 144
4.D.2. DC Nested Sweep -- Family of Transfer Curves	p. 147
4.D.3. NMOS Inverter Transfer Curve	p. 150
4.D.4. Goal Functions -- Inverter Analysis	p. 155
4.D.5. Parametric Sweep -- Family of Transfer Curves	p. 163
4.E. DC Nested Sweep -- BJT Characteristic Curves	p. 168
4.F. DC Current Gain of a BJT	p. 171
4.F.1. H[subscript FE] Versus Collector Current	p. 172
4.F.2. H[subscript FE] Versus I[subscript C] for Different Values of V[subscript CE]	p. 175
4.F.3. H[subscript FE] Versus Temperature	p. 178
4.G. Temperature Analysis -- Constant Current Sources	p. 182
4.G.1. Temperature Characteristics of a Resistor	p. 182
4.G.2. BJT Constant Current Source	p. 189
4.G.3. Op-Amp Constant Current Source	p. 194
4.H. Summary	p. 199
5. AC Sweep	p. 200
5.A. Magnitude and Phase (Phasors) Text Output	p. 200
5.B. Magnitude and Phase (Phasors) Graphical Output	p. 207
5.C. Bode Plots	p. 212
5.C.1. Using Goal Functions to Find the Upper 3 dB Frequency	p. 215
5.D. Amplifier Gain Analysis	p. 219
5.E. Operational Amplifier Gain	p. 221
5.F. Parametric Sweep -- Op-Amp Gain Bandwidth	p. 224
5.G. Performance Analysis -- Op-Amp Gain Bandwidth	p. 228
5.H. Mutual Inductance	p. 233
5.I. Measuring Impedance	p. 236
5.I.1. Impedance Measurement of a Passive Circuit	p. 236
5.I.2. Impedance Measurement of an Active Circuit	p. 239
5.J. Summary	p. 243
6. Transient Analysis	p. 244
6.A. Introduction	p. 244
6.A.1. Sources Used with the Transient Analysis	p. 244
6.A.2. Step Ceiling	p. 244
6.A.3. Convergence	p. 248
6.B. Capacitor Circuit with Initial Conditions	p. 251
6.B.1. Note on Initial Conditions	p. 257
6.C. Capacitor Step Response	p. 258
6.D. Inductor Transient Response	p. 261
6.E. Regulated DC Power Supply	p. 264
6.F. Zener Clipping Circuit	p. 268
6.F.1. Plotting Transfer Curves	p. 270
6.G. Amplifier Voltage Swing	p. 273
6.G.1. Fourier Analysis with Probe	p. 276
6.G.2. Fourier Analysis with PSpice	p. 281
6.H. Ideal Operation Amplifier Integrator	p. 284
6.I. Multiple Operational Amplifier Circuit	p. 289
6.J. Operational Amplifier Schmitt Trigger	p. 291
6.K. Parametric Sweep -- Inverter Switching Speed	p. 295
6.L. Performance Analysis -- Inverter Rise Time	p. 301
6.M. Stimulus Editor	p. 307
6.N. Temperature Sweep -- Linear Regulator	p. 311
6.O. Analog Behavioral Modeling	p. 315
6.O.1. Examples of ABM Parts	p. 315
6.O.2. Modeling the Step Response of a Feedback System	p. 323
6.O.3. Op-Amp Models with ABM Parts	p. 328
6.O.4. AC Sweep with ABM Parts	p. 329
6.O.5. Switching Power Supply	p. 330
6.P. Summary	p. 331
7. Creating and Modifying Models Using Schematics	p. 332
7.A. Changing the Model Reference	p. 333
7.B. Creating New Models Using the Breakout Parts	p. 336
7.C. Modifying Existing Models	p. 339
7.D. Changing the Library Path	p. 342
7.E. Copying Schematics to New Machines	p. 344
7.F. Model Parameters for Commonly Used Parts	p. 345
7.G. Creating a Subcircuit	p. 349
7.G.1. Creating a Subcircuit and Adding It to the Symbol Library	p. 349
7.G.2. Using the New Symbol in a Circuit	p. 361
7.G.3. Navigation	p. 364
7.G.4. Modifying the Subcircuit	p. 365
7.G.5. Creating a Second Symbol	p. 368
7.G.6. Restoring Schematics' Library Configuration	p. 371
7.H. Summary	p. 373
8. Digital Simulations	p. 374
8.A. Digital Signal Sources	p. 374
8.A.1. Digital Signal	p. 374
8.A.2. Digital Clock	p. 376
8.A.3. Digital Stimulus Part (DigStim)	p. 378
8.B. Mixed Analog and Digital Simulations	p. 384
8.C. Effect of Not Initializing Flip-Flops	p. 390
8.C.1. Start-Up Clear Circuit	p. 391
8.D. Pure Digital Simulations	p. 393
8.E. Gate Delays	p. 398
8.F. Summary	p. 400
8.G. Bibliography	p. 400
9. Monte Carlo Analyses	p. 401
9.A. Device Models	p. 401
9.A.1. Uniform Distribution	p. 401
9.A.2. Gaussian Distribution	p. 402
9.B. Voltage Divider Analysis	p. 402
9.B.1. Voltage Divider Minimum and Maximum Voltage Gain	p. 403
9.B.2. Voltage Divider Monte Carlo Analysis	p. 407
9.B.3. Performance Analysis -- Voltage Divider Gain Spread	p. 411
9.B.4. Voltage Divider Summary	p. 415
9.C. BJT Bias Analysis	p. 416
9.C.1. BJT Maximum and Minimum Collector Current	p. 416
9.C.2. BJT Minimum V[subscript CE]	p. 419
9.D. BJT Amplifier Minimum and Maximum Gain	p. 420
9.E. Performance Analysis -- Amplifier Frequency Response	p. 422
9.F. jFET Minimum and Maximum Drain Current	p. 427
9.F.1. jFET Minimum Bias Drain Current	p. 428
9.F.2. jFet Maximum Bias Drain Current	p. 430
9.G. Performance Analysis -- Inverter Switching Speed	p. 432
9.H. Summary	p. 439
9.I. Bibliography	p. 439
10. PC Board Layout with Schematics and PADS-PERFORM	p. 440
A. Installing Schematics Version 7.1 and PADS-PERFORM	p. 442
A.1. Installing Schematics	p. 442
A.1.a. Installing Win32s for Windows 3.x	p. 442
A.1.b. Installing the Schematics Software	p. 445
A.1.c. Installing the PSpice Libraries	p. 449
A.1.d. Circuit Files Used in the Text	p. 451
A.2. Installing PADS-PERFORM	p. 452
A.2.a. Installing PADS-PERFORM Software	p. 452
A.2.b. Installing the PADS Libraries	p. 454
A.2.c. Making Modifications to the Schematics Program	p. 456
B. Scale Multipliers for Pspice and Schematics	p. 459
C. Functions Available with Probe	p. 460
D. Schematic Errors	p. 461
E. Listing of CLASS.LIB Library	p. 466
Index	p. 475

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