Title:
Register transfer level design of compression processor core using verilog hardware description language
Personal Author:
Publication Information:
Skudai : Universiti Teknologi Malaysia, 2007
Physical Description:
1 CD-ROM ; 12 cm.
General Note:
Also available in printed version : TK5102.5 R674 2007 raf
Supervisor : Prof. Dr. Mohamed Khalil Mohd Hani
Subject Term:
Added Author:
Added Corporate Author:
DSP_DISSERTATION:
Thesis (Sarjana Kejuruteraan (Elektrik - Elektronik dan Telekomunikasi)) -Universiti Teknologi Malaysia, 2007
Available:*
Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
|---|---|---|---|---|---|
Searching... | 30000010153854 | CP 015017 | UTM Special Collection - Computer File | Compact Disc Accompanies UTM Thesis/Project Paper | Searching... |
