Skip to:Content
|
Bottom
Cover image for Ladder logic processor for programmable logic controllers (PLC) on field programmable gated array (FPGA)
Title:
Ladder logic processor for programmable logic controllers (PLC) on field programmable gated array (FPGA)
Publication Information:
2008
Physical Description:
xvi, 76 p. : ill. ; 30 cm.
General Note:
Supervisor : Zulfakar Aspar
Added Author:
Added Corporate Author:
DSP_DISSERTATION:
Project Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 2008

Available:*

Library
Item Barcode
Call Number
Material Type
Item Category 1
Status
Searching...
30000010223955 TK7872.L64 M79 2008 raf Closed Access Thesis UTM Project Paper (Closed Access)
Searching...

On Order

Go to:Top of Page