Inside cisco IOS software architecture

Curtis Murphy , CCIE #1521, is an engineer in Cisco's Serviceability Design Department in Research Triangle Park, specializing in IOS software products. He has worked in the networking industry since 1989 and at Cisco since 1994. While at Cisco, he has worked both as an IBM protocols specialist in the Technical Assistance Center and as a software engineer in IOS Software Development for mid-range and high-end routers.

Russ White , CCIE #2635, is a member of the IOS Network Protocols Deployment and Scalability Team at Cisco, where he is involved in the design and implementation of routing protocols and scalable network design.

Vijay Bollapragada , CCIE #1606, is currently a manager in the Solution Engineering team at Cisco, where he works on new world network solutions and resolves complex software and hardware problems with Cisco equipment. Vijay also teaches Cisco engineers and customers several courses, including Cisco Router Architecture, IP Multicast, Internet Quality of Service, and Internet Routing Architectures. He is also an adjunct professor in Duke University's electrical engineering department.

Introduction	p. xii
Objectives	p. xii
Organization	p. xiii
Chapter 1 Fundamental IOS Software Architecture	p. 2
Operating Systems Basics	p. 4
CPU Resource Management and Multitasking	p. 4
Memory Resource Management	p. 6
Interrupts	p. 7
IOS Architecture Overview	p. 7
Memory Organization	p. 9
Memory Pools	p. 12
IOS Processes	p. 13
Process Life Cycle	p. 14
IOS Process Priorities	p. 16
Process Examples	p. 17
IOS Kernel	p. 20
The Scheduler	p. 20
The Memory Manager	p. 24
Packet Buffer Management	p. 31
System Buffers	p. 32
Device Drivers	p. 38
Summary	p. 38
Chapter 2 Packet Switching Architecture	p. 40
Routing 101: Process Switching	p. 42
Traffic Load Sharing with Process Switching	p. 44
Disadvantages of Process Switching	p. 46
Fast Switching: Caching to the Rescue	p. 47
Fast Cache Organization	p. 49
Maintaining the Cache	p. 53
Traffic Load Sharing Considerations with Fast Switching	p. 55
Optimum Switching	p. 56
Cisco Express Forwarding	p. 58
How CEF Works	p. 59
Traffic Load Sharing with CEF	p. 63
Summary	p. 65
Chapter 3 Shared Memory Routers	p. 68
Hardware Architecture for Shared Memory Routers	p. 69
CPU	p. 70
Memory	p. 71
Interface Controllers	p. 74
Packet Buffers for Shared Memory Routers	p. 75
Private Buffer Pools	p. 75
Receive Rings and Transmit Rings	p. 77
Packet Switching on a Shared Memory Router	p. 79
Receiving the Packet	p. 79
Switching the Packet	p. 81
Transmitting the Packet	p. 83
Summary	p. 85
Chapter 4 Early Cbus Routers	p. 86
AGS+ Hardware Architecture	p. 87
Packet Switching with the Cbus	p. 90
Autonomous Switching	p. 90
Cbus Fast Packet Memory	p. 91
The Cisco 7000 Series Router	p. 92
Summary	p. 93
Chapter 5 Particle-Based Systems	p. 94
Buffer Management Using Particles	p. 95
Particle Pools	p. 98
Particle Coalescing	p. 99
The Cisco 7200 Series Routers	p. 99
Hardware Architecture	p. 101
Memory	p. 104
Packet Switching on the Cisco 7200 Series Routers	p. 106
Packet Receive Stage	p. 106
Packet Switching Stage	p. 108
Packet Transmit Stage	p. 109
Summary	p. 111
Chapter 6 Cisco 7500 Routers	p. 112
Hardware Architecture of the Cisco 7500 Router	p. 113
The Data Bus	p. 114
Route Switch Processor	p. 115
Packet Switching on the Cisco 7500 Router	p. 123
RSP Switching: Receiving the Packet	p. 124
RSP Switching: Switching the Packet	p. 126
RSP Switching: Transmitting the Packet	p. 129
VIP Architecture	p. 131
VIP Components	p. 132
VIP Models	p. 134
VIP Packet Operations: Distributed Switching	p. 135
VIP Receive Side Buffering	p. 141
Troubleshooting Tips for the Cisco 7500 Router	p. 142
High CPU Utilization	p. 142
Input Drops	p. 144
Ignores	p. 145
Output Drops	p. 145
Summary	p. 145
Chapter 7 The Cisco Gigabit Switch Router: 12000	p. 146
Hardware Architecture	p. 147
Switching Fabric	p. 148
Maintenance Bus	p. 154
Gigabit Route Processor	p. 154
Line Card	p. 155
Packet Switching	p. 161
Packet Switching: Engine 0 and Engine 1	p. 162
Packet Switching: Engine 2 LC	p. 164
Packet Switching: Switching Cells across Fabric	p. 165
Packet Switching: Transmitting Packets	p. 165
Summary	p. 167
Chapter 8 Quality of Service	p. 168
QoS Overview	p. 169
Congestion Management	p. 171
Congestion Avoidance	p. 172
Priority Queuing	p. 172
Configuring and Monitoring Priority Queuing	p. 173
Custom Queuing	p. 175
Weighted Fair Queuing	p. 178
Platform-Independent WFQ	p. 179
Configuring and Monitoring WFQ	p. 182
Distributed Weighted Fair Queuing	p. 188
Modified Deficit Round Robin	p. 191
Configuration of MDRR	p. 194
Weighted Random Early Detection	p. 195
Configuration and Monitoring of WRED	p. 197
Selective Packet Discard	p. 198
Other QoS Features	p. 199
Summary	p. 199
Appendix A NetFlow Switching	p. 200
Flow Cache Maintenance	p. 202
Flow Export	p. 204
Router-Based Flow Aggregation Export (RBA)	p. 205
Index	p. 206

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