Silicon nanoelectronics

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Boca Raton : Taylor & Francis, 2006

ISBN:

9780824726331

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Molecular electronics

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Library	Item Barcode	Call Number	Material Type	Item Category 1	Status
Searching... PSZ JB	30000004706515	TK7874.8 S54 2006	Open Access Book	Book	Searching... Unknown

Technological advancement in chip development, primarily based on the downscaling of the feature size of transistors, is threatening to come to a standstill as we approach the limits of conventional scaling. For example, when the number of electrons in a device's active region is reduced to less than ten electrons (or holes), quantum fluctuation errors will occur, and when gate insulator thickness becomes too insignificant to block quantum mechanical tunneling, unacceptable leakage will occur. Fortunately, there is truth in the old adage that whenever a door closes, a window opens somewhere else. In this case, that window opening is nanotechnology.

Silicon Nanoelectronics takes a look at at the recent development of novel devices and materials that hold great promise for the creation of still smaller and more powerful chips. Silicon nanodevices are positoned to be particularly relevant in consideration of the existing silicon process infrastructure already in place throughout the semiconductor industry and silicon's consequent compatibility with current CMOS circuits. This is reinforced by the nearly perfect interface that can exist between natural oxide and silicon.

Presenting the contributions of more than 20 leading academic and corporate researchers from the United States and Japan, Silicon Nanoelectronics offers a comprehensive look at this emergent technology. The text includes extensive background information on the physics of silicon nanodevices and practical CMOS scaling. It considers such issues as quantum effects and ballistic transport and resonant tunneling in silicon nanotechnology. A significant amount of attention is given to the all-important silicon single electron transistors and the devices that utilize them.

In offering an update of the current state-of-the-art in the field of silicon nanoelectronics, this volume serves well as a concise reference for students, scientists, engineers, and specialists in various fields, in

Author Notes

Shunri Oda , David Ferry

David K. Ferry and Richard Akis and Matthew J. Gilbert and Stephen M. RameyDavid J. FrankHisao KawauraToshiro HiramotoHiroshi Mizuta and Katsuhiko Nishiguchi and Shunri OdaMichiharu Tabe and Hiroya Ikeda and Yasuhiko IshikawaL. Jay GuoSandip TiwariKazuo YanoKazuo Nakazato and Haroon AhmedYasuo Takahashi and Yukinori Ono and Akira Fujiwara and Hiroshi Inokawa

Chapter 1 Physics of Silicon Nanodevices	p. 1
1.1 Introduction	p. 1
1.2 Small MOSFETs	p. 2
1.2.1 The Simple One-Dimensional Theory	p. 3
1.2.2 Ballistic Transport in the MOSFET	p. 4
1.3 Granularity	p. 8
1.4 Quantum Behavior in the Device	p. 10
1.4.1 The Effective Potential	p. 10
1.4.1.1 Effective Carrier Wave Packet	p. 11
1.4.1.2 Statistical Considerations	p. 13
1.4.2 Quantum Simulations	p. 16
1.4.2.1 The Device Structure	p. 16
1.4.2.2 The Wave Function and Technique	p. 17
1.4.2.3 Results	p. 21
1.5 Quantum Dot Single-Electron Devices	p. 23
1.6 Many-Body Interactions	p. 23
1.7 Acknowledgments	p. 26
References	p. 26
Chapter 2 Practical CMOS Scaling	p. 33
2.1 Introduction	p. 33
2.2 CMOS Technology Overview	p. 33
2.2.1 Current CMOS Device Technology	p. 33
2.2.2 International Technology Roadmap for Semiconductors (ITRS) Projections	p. 35
2.3 Scaling Principles	p. 36
2.2.1 General Scaling	p. 37
2.3.2 Characteristic Scale Length	p. 38
2.4 Exploratory Technology	p. 40
2.4.1 New Materials	p. 41
2.4.2 Fully Depleted SOI	p. 42
2.4.3 Double-Gate and Multiple-Gate FET Structures	p. 43
2.5 Limits to Scaling	p. 48
2.5.1 Quantum Mechanics	p. 48
2.5.2 Atomistic Effects	p. 50
2.5.3 Thermodynamic Effects	p. 53
2.5.4 Practical Considerations	p. 53
2.6 Power-Constrained Scaling Limits	p. 54
2.7 Summary	p. 58
Acknowledgments	p. 58
References	p. 58
Chapter 3 The Scaling Limit of MOSFETs due to Direct Source-Drain Tunneling	p. 65
3.1 Introduction	p. 65
3.2 EJ-MOSFETs	p. 68
3.2.1 Concept of EJ-MOSFETs	p. 68
3.2.2 Fabrication of the Device Structure	p. 70
3.2.3 Basic Operation	p. 72
3.3 Direct Source-Drain Tunneling	p. 75
3.3.1 Detection of the Tunneling Current	p. 75
3.3.2 Numerical Study of the Tunneling Current	p. 78
3.4 The Scaling Limit of MOSFETs	p. 83
3.4.1 Estimation of Direct Source-Drain Tunneling in MOSFETs	p. 83
3.4.2 Future Trends in Post-6-nm MOSFETs	p. 85
3.5 Conclusion	p. 86
Acknowledgments	p. 86
References	p. 86
Chapter 4 Quantum Effects in Silicon Nanodevices	p. 89
4.1 Introduction	p. 89
4.2 Quantum Effects in MOSFETs	p. 90
4.2.1 Band Structures of Silicon	p. 90
4.2.2 Surface Quantization	p. 90
4.2.3 Carrier Confinement in Thin SOI MOS Structures	p. 92
4.2.4 Mobility of Confined Carriers	p. 92
4.3 Influences of Quantum Effects in MOSFETs	p. 93
4.3.1 Threshold Voltage Increase in Bulk MOSFETs	p. 93
4.3.2 Threshold Voltage Increase in FD-SOI MOSFETs	p. 94
4.3.3 Mobility in Ultrathin FD-SOI MOSFETs	p. 95
4.4 Quantum Effects in Ultranarrow Channel MOSFETs	p. 95
4.4.1 Advantage of Quantum Effects in Ultranarrow Channel MOSFETs	p. 95
4.4.2 Threshold Voltage Increase in n-Type Narrow Channel MOSFETs	p. 95
4.4.3 Threshold Voltage Increase in n-Type and p-Type Narrow Channel MOSFETs	p. 97
4.4.4 Threshold Voltage Adjustment Using Quantum Effects	p. 99
4.4.5 Mobility Enhancement due to Quantum Effects	p. 100
4.5 Summary	p. 102
References	p. 103
Chapter 5 Ballistic Transport in Silicon Nanostructures	p. 105
5.1 Introduction	p. 105
5.2 Ballistic Transport in Quantum Point Contacts	p. 106
5.3 Ballistic Transport in Ultra-Short Channel Vertical Silicon Transistors	p. 113
5.3.1 Fabrication of Nanoscale Vertical FETs	p. 113
5.3.2 Conductance Quantization in Nanoscale Vertical FETs	p. 117
5.3.3 Characteristics under a Magnetic Field	p. 121
5.3.4 Effects of Cross-Sectional Channel Geometries	p. 125
5.4 Summary and Future Subjects	p. 128
References	p. 129
Chapter 6 Resonant Tunneling in Si Nanodevices	p. 133
6.1 Introduction	p. 133
6.1.1 Outline of Resonant Tunneling	p. 133
6.1.1.1 Early Work on Resonant Tunneling	p. 133
6.1.1.2 Resonant Tunneling in Si-Based Materials - Si/SiGe and Si/SiO[subscript 2]	p. 134
6.1.2 Quantum Confinement Effect in a Thin Si Layer	p. 134
6.1.3 Double-Barrier Structures of SiO[subscript 2]/Si/SiO[subscript 2] Formed by Anisotropic Etching	p. 136
6.2 Resonant Tunneling in SiO[subscript 2]/Si/SiO[subscript 2]	p. 139
6.2.1 Fabrication of an RTD	p. 139
6.2.2 Resonant Tunneling in the Low Voltage Region	p. 141
6.2.3 Hot-Electron Storage in the High-Voltage Region	p. 143
6.2.4 Switching of Tunnel-Modes: Comparison with a Single Barrier	p. 147
6.3 Zero-Dimensional Resonant Tunneling	p. 148
6.3.1 Coexistence of Coulomb Blockade and Resonant Tunneling	p. 148
6.3.2 Fabrication of a SiO[subscript 2]/Si-Dots/SiO[subscript 2] Structure	p. 149
6.3.3 I-V Characteristics of an SiO[subscript 2]/Si-Dots/SiO[subscript 2] Tunnel Diode	p. 151
Acknowledgment	p. 152
References	p. 152
Chapter 7 Silicon Single-Electron Transistor and Memory	p. 155
7.1 Introduction	p. 155
7.1.1 Quantum Dot Transistor	p. 156
7.2 Theoretical Background	p. 158
7.2.1 Energy of the Quantum Dot System	p. 159
7.2.2 Conductance Oscillation and Potential Fluctuation	p. 161
7.2.3 Transport under Finite Temperature and Finite Bias	p. 162
7.3 Device Structure and Fabrication	p. 165
7.4 Experimental Results and Analysis	p. 166
7.4.1 Single-Electron Quantum-Dot Transistor	p. 167
7.4.2 Single-Hole Quantum-Dot Transistor	p. 168
7.4.3 Transport Characteristics under Finite Bias	p. 169
7.4.4 Transport Through Excited States	p. 172
7.5 Artificial Atom	p. 173
7.6 Single Charge Trapping	p. 174
7.7 Introduction to Memory Devices	p. 176
7.8 Floating Gate Scheme	p. 177
7.9 Single-Electron MOS memory (SEMM)	p. 179
7.9.1 Structure of SEMM	p. 179
7.9.2 Fabrication Procedure	p. 180
7.9.3 Experimental Observations	p. 181
7.9.4 Analysis	p. 183
7.9.5 Effects of Trap States	p. 186
7.10 Effect of Thicker Tunnel Oxide	p. 187
7.11 Discussion	p. 190
References	p. 191
Chapter 8 Silicon Memories Using Quantum and Single-Electron Effects	p. 195
8.1 Introduction	p. 195
8.2 Single-Electron Effect	p. 196
8.3 Single-Electron Transistors and Their Memories	p. 199
8.3.2 Memories by Scaling Floating Gates of Flash Structures	p. 200
8.4 Modeling of Transport: Tunneling	p. 204
8.4.1 Tunneling in Oxide	p. 204
8.4.2 Quantum Kinetic Equation	p. 205
8.4.3 Carrier Statistics and Charge Fluctuations	p. 207
8.5 Experimental Behavior of Memories	p. 208
8.5.1 Percolation Effects	p. 212
8.5.2 Limitations in Use of Field Effect	p. 212
8.5.3 Confinement and Random Effects in Semiconductors	p. 213
8.5.4 Variances due to Dimensions	p. 213
8.5.5 Limits due to Tunneling	p. 215
8.5.5.1 Tunneling in Oxide	p. 215
8.5.5.2 Tunneling in Silicon	p. 215
8.6 Can We Avoid Use of Collective Phenomena?	p. 217
8.7 Summary	p. 219
References	p. 220
Chapter 9 SESO Memory Devices	p. 223
9.1 Introduction	p. 223
9.1.1 How Nanotechnologies Solve Real Problems	p. 223
9.1.2 New Direction of Electronics	p. 223
9.2 Conventional Memory Technologies	p. 225
9.2.1 Classification of Conventional Memories	p. 225
9.2.2 Origin of DRAM Power Consumption	p. 226
9.3 Bandgap Enlargement in Nanosilicon	p. 227
9.4 SESO Transistor	p. 230
9.4.1 History: Single-Electron Devices to SESO	p. 230
9.4.2 Fabricated SESO Transistor	p. 231
9.5 SESO Memory	p. 232
9.6 Memory-Technology Comparison	p. 236
9.7 SESO as On-Chip RAM Component	p. 237
9.8 Conclusions	p. 239
Acknowledgments	p. 240
References	p. 240
Chapter 10 Few Electron Devices and Memory Circuits	p. 243
10.1 Introduction	p. 243
10.2 Current Semiconductor Memories	p. 244
10.2.1 Limitations of the DRAM	p. 244
10.2.2 DRAM Gain Cell	p. 246
10.3 A New DRAM Gain Cell - The PLEDM	p. 247
10.3.1 PLEDTR	p. 248
10.3.2 PLEDM Cell	p. 253
10.4 Single-Electron Memory	p. 254
10.4.1 Single-Electron Devices	p. 256
10.4.2 Operation Principle of Single-Electron Memory	p. 257
10.4.2.1 Local Stability	p. 257
10.4.2.2 Global Stability	p. 260
10.4.3 Experimental Single-Electron Memory	p. 264
10.4.3.1 First Experimental Single-Electron Memory	p. 264
10.4.3.2 Silicon Single-Electron Memory	p. 269
10.4.4 Single-Electron Memory Array	p. 273
10.5 Conclusion	p. 276
References	p. 277
Chapter 11 Single-Electron Logic Devices	p. 281
11.1 Introduction	p. 281
11.2 Single-Electron Transistor (SET)	p. 282
11.3 Fabrication of Si SETs	p. 286
11.4 Logic Circuit Applications of SETs	p. 288
11.4.1 Fundamentals of SET Logic	p. 289
11.4.2 Merged SET and MOSFET Logic	p. 290
11.4.3 CMOS-Type Logic Circuit	p. 292
11.4.4 Pass-Transistor Logic	p. 294
11.4.5 Multigate SET	p. 296
11.4.6 Multiple-Valued Operation	p. 298
11.5 Conclusion	p. 301
References	p. 301
Index	p. 305

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