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Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
|---|---|---|---|---|---|
Searching... | 30000010093327 | TK7871.2 L47 2005 | Open Access Book | Book | Searching... |
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Summary
Summary
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers.
The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits.
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components.
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.Table of Contents
| Abstract |
| List of Symbols and Abbreviations |
| 1 Introduction |
| 1.1 The Growth of the Wireless Communication Market |
| 1.2 Evolution to CMOS RF |
| 1.3 CMOS, RF and ESD |
| 1.4 Outline of this Book |
| 2 Low-Noise Amplifiers in CMOS Wireless Receivers |
| 2.1 Introduction |
| 2.2 Some Important RF Concepts |
| 2.3 The Deep Sub-Micron MOS Transistor at Radio Frequencies |
| 2.4 The Origin of Noise |
| 2.5 The LNA in the Receiver Chain |
| 2.6 Topologies for Low-Noise Amplifiers |
| 2.7 Conclusion |
| 3 ESD Protection in CMOS |
| 3.1 Introduction |
| 3.2 ESD Tests and Standards |
| 3.3 ESD-Protection in CMOS |
| 3.4 Conclusion |
| 4 Detailed Study of the Common-Source LNA with Inductive Degeneration |
| 4.1 Introduction |
| 4.2 The Non-Quasi Static Gate Resistance |
| 4.3 Parasitic Input Capacitance |
| 4.4 Miller Capacitance |
| 4.5 Optimization of the Cascode Transistor |
| 4.6 Output Capacitance Non-Linearity |
| 4.7 Impact of a Non-Zero S11 |
| 4.8 Output Considerations |
| 4.9 LNA Bandwidth |
| 4.10 Layout Aspects |
| 4.11 The Common-Gate LNA Revisited |
| 4.12 Conclusion |
| 5 RF-ESD Co-Design for CMOS LNA's |
| 5.1 Introduction |
| 5.2 ESD-protection within an L-Type Matching Network |
| 5.3 ESD-Protection within a _-Type Matching Network |
| 5.4 Inductive ESD-Protection |
| 5.5 Comparison |
| 5.6 Other ESD-Protection Strategies |
| 5.7 ESD-Protection for the Common-Gate LNA |
| 5.8 Conclusion |
| 6 Integrated CMOS Low-Noise Amplifiers |
| 6.1 Introduction |
| 6.2 A 0.8 dB NF ESD-Protected 9 mW CMOS LNA |
| 6.3 A 1.3 dB NF CMOS LNA for GPS with 3 kV HBM ESD-Protection |
| 6.4 A 5 GHz LNA with Inductive ESD-Protection Exceeding 3 kV HBM |
| 6.5 Conclusion |
| 7 Conclusions |
| A Fundamentals of Two-Port Noise Theory |
| Index |
