Title:
Bias temperature instability for devices and circuits
Publication Information:
New York : Springer, 2014
Physical Description:
xi, 810 pages : ill. (some col.) ; 24 cm.
ISBN:
9781461479086
Added Author:
Available:*
Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
|---|---|---|---|---|---|
Searching... | 30000010337502 | TJ223.T4 B53 2014 | Open Access Book | Book | Searching... |
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Summary
Summary
This book provides a single-source reference to one of the more challenging reliability issues plaguing modern semiconductor technologies, negative bias temperature instability. Readers will benefit from state-of-the art coverage of research in topics such as time dependent defect spectroscopy, anomalous defect behavior, stochastic modeling with additional metastable states, multiphonon theory, compact modeling with RC ladders and implications on device reliability and lifetime.
Table of Contents
| Part I Bias Temperature Instability Characterization Methods |
| Application of on-chip device heating for BTI investigations |
| Statistical Characterization of BTI Induced High-k Dielectric Traps in Nanoscale Transistors |
| The time dependent defect spectroscopy |
| Analysis of Oxide Traps in Nanoscale MOSFETs using Random Telegraph Noise |
| BTI Induced Statistical Variations |
| Statistical Distribution of Defect Parameters |
| Atomic Scale Defects Associated with the Negative Bias Temperature Instability |
| Charge Properties of Paramagnetic Defects in Semiconductor/Oxide Structures |
| Oxide Defects |
| Understanding Negative-Bias Temperature Instability from Dynamic Stress Experiments |
| Part II Atomistic Modeling of Defects Implicated in the Bias Temperature Instability |
| Statistical Study of Bias Temperature Instabilities by means of 3D 'Atomistic' Simulation |
| A Comprehensive Modeling Framework for DC and AC NBTI |
| On the Microscopic Limit of the RD Model |
| Advanced Modeling of Oxide Defects |
| The Capture/Emission Time Map Approach to the Bias Temperature Instability |
| FEOL and BEOL Process Dependence of NBTI |
| Negative Bias Temperature Instability in Thick Gate Oxides for Power MOS Transistors |
| NBTI and PBTI in High-k Metal Gate |
| PBTI in High-k Oxides |
| Characterization of Individual Traps in High-k Oxides |
| NBTI in (Si)Ge channel devices |
| Characteristics of NBTI in Multi-Gate FETs for Highly-Scaled CMOS Technology |
| Bias-Temperature Instabilities in Silicon Carbide MOS Devices |
| Part IV On-Chip Silicon Odometers for Circuit Aging Characterization |
| Multi-level Reliability Simulation for IC Design |
| Charge trapping in MOSFETS: BTI and RTN Modeling for Circuits |
| Simulation of BTI related time-dependent variability in CMOS circuits |
