Patterns for time-triggered embedded systems : building reliable applications with the 8051 family of microcontrollers

This title describes the first comprehensive set of design patterns to support the development of embedded systems based on the 8051 family of microcontrollers. In total, details of more than 70 useful patterns are provided, complete with guidelines to help you apply these techniques in your own projects: full source code for all of the patterns is included on the associated CD.

Author Notes

Michael J. Pont is Senior Lecturer in Electronic & Software Engineering at the University of Leicester. For over a decade, he has performed state-of-the-art research in software design and programming in conjunction with many companies worldwide. He is author or co-author of more than seventy technical publications.

Foreword	p. xiv
Preface	p. xvi
Introduction	p. 1
1 What is a time-triggered embedded system?	p. 3
1.1 Introduction	p. 3
1.2 Information systems	p. 3
1.3 Desktop systems	p. 5
1.4 Real-time systems	p. 6
1.5 Embedded systems	p. 8
1.6 Event-triggered systems	p. 10
1.7 Time-triggered systems	p. 11
1.8 Conclusions	p. 14
2 Designing embedded systems using patterns	p. 15
2.1 Introduction	p. 15
2.2 Limitations of existing software design techniques	p. 17
2.3 Patterns	p. 22
2.4 Patterns for time-triggered systems	p. 24
2.5 Conclusions	p. 25
Part A Hardware foundations	p. 27
3 The 8051 microcontroller family	p. 29
Standard 8051	p. 30
Small 8051	p. 41
Extended 8051	p. 46
4 Oscillator hardware	p. 53
Crystal Oscillator	p. 54
Ceramic Resonator	p. 64
5 Reset hardware	p. 67
Rc Reset	p. 68
Robust Reset	p. 77
6 Memory issues	p. 81
On-Chip Memory	p. 82
Off-Chip Data Memory	p. 94
Off-Chip Code Memory	p. 100
7 Driving DC loads	p. 109
Naked Led	p. 110
Naked Load	p. 115
IC Buffer	p. 118
BJT Driver	p. 124
IC Driver	p. 134
Mosfet Driver	p. 139
SSR Driver (DC)	p. 144
8 Driving AC loads	p. 148
Emr Driver	p. 149
SSR Driver (AC)	p. 156
Part B Software foundations	p. 159
9 A rudimentary software architecture	p. 161
Super Loop	p. 162
Project Header	p. 169
10 Using the ports	p. 173
Port I/O	p. 174
Port Header	p. 184
11 Delays	p. 193
Hardware Delay	p. 194
Software Delay	p. 206
12 Watchdogs	p. 215
Hardware Watchdog	p. 217
Part C Time-triggered architectures for single-processor systems	p. 229
13 An introduction to schedulers	p. 231
13.1 Introduction	p. 231
13.2 The desktop OS	p. 231
13.3 Assessing the super loop architecture	p. 233
13.4 A better solution	p. 235
13.5 Example: Flashing an LED	p. 239
13.6 Executing multiple tasks at different time intervals	p. 243
13.7 What is a scheduler?	p. 245
13.8 Co-operative and pre-emptive scheduling	p. 246
13.9 A closer look at pre-emptive schedulers	p. 250
13.10 Conclusions	p. 253
14 Co-operative schedulers	p. 254
Co-Operative Scheduler	p. 255
15 Learning to think co-operatively	p. 297
Loop Timeout	p. 298
Hardware Timeout	p. 305
16 Task-oriented design	p. 316
Multi-Stage Task	p. 317
Multi-State Task	p. 322
17 Hybrid schedulers	p. 332
Hybrid Scheduler	p. 333
Part D The user interface	p. 359
18 Communicating with PCs via RS-232	p. 361
PC Link (RS-232)	p. 362
19 Switch interfaces	p. 397
Switch Interface (Software)	p. 399
Switch Interface (Hardware)	p. 410
On-Off Switch	p. 414
Multi-State Switch	p. 423
20 Keypad interfaces	p. 433
Keypad Interface	p. 434
21 Multiplexed LED displays	p. 449
Mx Led Display	p. 450
22 Controlling LCD panels	p. 465
LCD Character Panel	p. 467
Part E Using serial peripherals	p. 491
23 Using 'I[superscript 2]C' peripherals	p. 493
I[superscript 2]C Peripheral	p. 494
24 Using 'SPI' peripherals	p. 520
SPI Peripheral	p. 521
Part F Time-triggered architectures for multiprocessor systems	p. 537
25 An introduction to shared-clock schedulers	p. 539
25.1 Introduction	p. 539
25.2 Additional CPU performance and hardware facilities	p. 539
25.3 The benefits of modular design	p. 541
25.4 How do we link more than one processor	p. 543
25.5 Why additional processors may not always improve reliability	p. 550
25.6 Conclusions	p. 552
26 Shared-clock schedulers using external interrupts	p. 553
SCI Scheduler (Tick)	p. 554
SCI Scheduler (Data)	p. 593
27 Shared-clock schedulers using the UART	p. 608
SCU Scheduler (Local)	p. 609
SCU Scheduler (RS-232)	p. 642
SCU Scheduler (RS-485)	p. 646
28 Shared-clock schedulers using CAN	p. 675
SCC Scheduler	p. 677
29 Designing multiprocessor applications	p. 711
Data Union	p. 712
Long Task	p. 716
Domino Task	p. 720
Part G Monitoring and control components	p. 725
30 Pulse-rate sensing	p. 727
Hardware Pulse Count	p. 728
Software Pulse Count	p. 736
31 Pulse-rate modulation	p. 741
Hardware PRM	p. 742
Software PRM	p. 748
32 Using analogue-to-digital converters (ADCs)	p. 756
One-Shot ADC	p. 757
ADC Pre-Amp	p. 777
Sequential ADC	p. 782
A-A Filter	p. 794
Current Sensor	p. 802
33 Pulse-width modulation	p. 807
Hardware PWM	p. 808
PWM Smoother	p. 818
3-Level PWM	p. 822
Software PWM	p. 831
34 Using digital-to-analog converters (DACs)	p. 840
DAC Output	p. 841
DAC Smoother	p. 853
DAC Driver	p. 857
35 Taking control	p. 860
PID Controller	p. 861
Part H Specialized time-triggered architectures	p. 891
36 Reducing the system overheads	p. 893
255-Tick Scheduler	p. 894
One-Task Scheduler	p. 911
One-Year Scheduler	p. 919
37 Increasing the stability of the scheduling	p. 931
Stable Scheduler	p. 932
Conclusions	p. 941
38 What this book has tried to do	p. 941
38.1 Introduction	p. 943
38.2 What this book has tried to do	p. 943
38.3 Conclusions	p. 943
39 Collected references and bibliography	p. 946
39.1 Complete list of publications	p. 946
39.2 Other pattern collections	p. 952
39.3 Design techniques for real-time/embedded systems	p. 952
39.4 Design techniques for high-reliability systems	p. 953
39.5 The 8051 microcontroller	p. 954
39.6 Related publications by the author	p. 954
Appendices	p. 955
A The design notation and CASE tool	p. 957
Overview	p. 957
The CASE tool	p. 957
The notation	p. 957
B Guide to the CD	p. 980
Overview	p. 980
The basis of the CD	p. 980
The source code for this book	p. 980
C Guide to the WWW site	p. 982
Overview	p. 982
The URL	p. 982
Contents of the WWW site	p. 982
Bug reports and code updates	p. 982
Index	p. 985

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Table of Contents