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Cover image for CMOS voltage reference : an analytical and practical perspective
Title:
CMOS voltage reference : an analytical and practical perspective
Edition:
First edition.
Publication Information:
Hoboken : IEEE ; Wiley, 2013
Physical Description:
xvii, 292 pages : illustrations ; 25 cm.
ISBN:
9781118275689
Abstract:
"A practical overview of CMOS circuit design, this book covers the technology, analysis, and design techniques of voltage reference circuits. The design requirements covered follow modern CMOS processes, with an emphasis on low power, low voltage, and low temperature coefficient voltage reference design. Dedicating a chapter to each stage of the design process, the authors have organised the content to give readers the tools they need to implement the technologies themselves. Readers will gain an understanding of device characteristics, the practical considerations behind circuit topology, and potential problems with each type of circuit. Many design examples are used throughout, most of which have been tested with silicon implementation or employed in real-world products. This ensures that the material presented relevant to both students studying the topic as well as readers requiring a practical viewpoint"-- Provided by publisher.

"This book covers the technology, analysis, and design techniques of voltage reference circuits"-- Provided by publisher.

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30000010335965 TK454 C564 2013 Open Access Book Book
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Summary

Summary

A practical overview of CMOS circuit design, this book covers the technology, analysis, and design techniques of voltage reference circuits. The design requirements covered follow modern CMOS processes, with an emphasis on low power, low voltage, and low temperature coefficient voltage reference design. Dedicating a chapter to each stage of the design process, the authors have organized the content to give readers the tools they need to implement the technologies themselves. Readers will gain an understanding of device characteristics, the practical considerations behind circuit topology, and potential problems with each type of circuit.

Many design examples are used throughout, most of which have been tested with silicon implementation or employed in real-world products. This ensures that the material presented relevant to both students studying the topic as well as readers requiring a practical viewpoint.

Covers CMOS voltage reference circuit design, from the basics through to advanced topics Provides an overview of basic device physics and different building blocks of voltage reference designs Features real-world examples based on actual silicon implementation Includes analytical exercises, simulation exercises, and silicon layout exercises, giving readers guidance and design layout experience for voltage reference circuits Solution manual available to instructors from the book's companion website

This book is highly useful for graduate students in VLSI design, as well as practicing analog engineers and IC design professionals. Advanced undergraduates preparing for further study in VLSI will also find this book a helpful companion text.


Author Notes

Chi-Wah Kok, Canaan Microelectronics Corporation Limited, China
Chi-Wah Kok obtained his degree from the University of Wisconsin Madison. Since 1992, he has been working with various semi-conductor companies, research institutions and universities, which include AT&T Labs Research, Holmdel, SONY U.S. Research Labs, Stanford University, Hong Kong University of Science and Technology, Hong Kong Polytechnic University, City University of Hong Kong, and Lattice Semiconductor. In 2006, he founded Canaan Microelectronics Corp Ltd., a fabless IC company with products in mixed signal IC for consumer electronics. He has extensively applied signal processing techniques to improve the circuit topologies, designs, and fabrication technologies within Canaan. This includes the application of semidefinite programming to circuit design optimization, abstract algebra in switched capacitor circuit topologies improvement, and nonlinear optimization methods to optimize high voltage MOSFET layout and fabrication.

Wing-Shan Tam, Canaan Microelectronics Corp Limited, China
Wing-Shan Tam received her BEng degree in electronic engineering from The Chinese University of Hong Kong, and MSc degree in electronic and information engineering from The Hong Kong Polytechnic University, and PhD degree in electronic engineering from the City University of Hong Kong in 2004, 2007, and 2010, respectively. Currently, she is the Engineering Manager of Canaan Microelectronics Corp Ltd., and she has been working with CMOS circuit design since 2004. Her research interests include mixed-signal integrated circuit design for data conversion and power-management.


Table of Contents

About the Authorsp. ix
Prefacep. xi
Acknowledgementsp. xiii
Nomenclaturep. xv
1 Warm Upp. 1
1.1 Bipolar Junction Transistorsp. 2
1.1.1 Differential V BEp. 5
1.2 Metal-Oxide Semiconductor Field-Effect Transistorp. 7
1.2.1 Cutoff Regionp. 11
1.2.2 Subthreshold Conductionp. 11
1.2.3 Triode Regionp. 14
1.2.4 Saturation Regionp. 16
1.2.5 Thermal Propertiesp. 19
1.2.6 Channel Length Modulation Effectp. 23
1.3 Diodep. 23
1.4 Resistorp. 25
1.4.1 Dummy Elementp. 27
1.4.2 Guard Ringp. 27
1.4.3 Sheet Resistancep. 27
1.5 Device Matchingp. 28
1.5.1 Application of Statistics to Circuit Designp. 28
1.5.2 Systematic Variationp. 30
1.6 Simulation Models for Circuit Designp. 31
1.6.1 Process Variation and Typical Designp. 32
1.6.2 Process Cornersp. 34
1.7 Noisep. 36
1.7.1 Types of Noisesp. 36
1.7.2 Sums and Multiplications of Noisesp. 38
1.8 Fabrication Technologyp. 39
1.9 Book Organizationp. 40
1.10 Exercisesp. 42
Referencesp. 46
2 Voltage Referencep. 49
2.1 Performance Measuresp. 49
2.1.1 Line Regulationp. 51
2.1.2 Temperature Coefficientp. 54
2.1.3 Power Supply Rejection Ratiop. 56
2.1.4 Quiescent Currentp. 59
2.1.5 Output Noisep. 60
2.2 Other Design Considerationsp. 62
2.3 Summaryp. 63
2.4 Exercisesp. 65
Referencesp. 70
3 Bandgap Voltage Referencep. 71
3.1 Widlar Bandgap Voltage Reference Circuitp. 71
3.2 Drain Voltage Equalization Current Mirrorp. 74
3.2.1 Opamp Based ß-Multiplier Bandgap Voltage Reference Circuitp. 76
3.2.2 Bandgap Voltage Reference Circuitp. 77
3.3 Major Circuit Elementsp. 81
3.3.1 Operational Amplifierp. 81
3.3.2 Current Mirrorp. 86
3.3.3 Startup Circuitp. 88
3.3.4 Resistor Networkp. 93
3.3.5 Bipolar Transistorp. 94
3.4 Complete Layoutp. 95
3.5 Summaryp. 95
3.6 Exercisesp. 96
Referencesp. 101
4 Error Sources in Bandgap Voltage Reference Circuitp. 103
4.1 Non-Ideal Opampp. 103
4.1.1 Input Offset Voltagep. 104
4.1.2 Limited Gain and Power Supply Rejection Ratiop. 112
4.1.3 Noisep. 113
4.2 Current Mirror Mismatchp. 114
4.2.1 Channel Length Modulation Effect Compensationp. 116
4.2.2 Cascode Current Mirrorp. 117
4.3 Bipolar Transistorp. 122
4.3.1 Size Variationp. 122
4.3.2 Series Base Resistancep. 122
4.3.3 ß Variationp. 125
4.4 Resistor Variationp. 126
4.5 Power Supply Variationp. 127
4.5.1 Pre-Regulationp. 132
4.6 Output Loadingp. 135
4.7 Output Noisep. 138
4.8 Voltage Reference Circuit Trimmingp. 140
4.8.1 Linked Fuse Resistor Trimmingp. 141
4.8.2 Resistor Trimming Circuit Analysisp. 142
4.8.3 Modulated Trimmingp. 146
4.8.4 Voltage Domain Trimmingp. 148
4.8.5 Current Domain Trimmingp. 149
4.9 Summaryp. 149
4.10 Exercisesp. 151
Referencesp. 161
Advanced Voltage Reference Circuits
5 Temperature Compensation Techniquesp. 165
5.1 V BE - ¿ V BE Compensationp. 166
5.1.1 Brokaw Bandgap Voltage Referencep. 168
5.1.2 ß-Multiplier V BE - ¿V BE Compensationp. 170
5.2 Widlar PTAT Current Source and V BE Compensationp. 175
5.3 V GS Based Temperature Compensationp. 177
5.3.1 V GS Current Sourcep. 178
5.4 Summaryp. 182
5.5 Exercisesp. 183
Referencesp. 189
6 Sub-1V Voltage Reference Circuitp. 191
6.1 Sub-1V Output Stagep. 193
6.2 Voltage Headroom in Opamp based ß-multiplier Voltage Reference Circuitp. 195
6.2.1 Opamp with NMOS Input Stagep. 197
6.2.2 Local Voltage Boostingp. 198
6.2.3 Low V th Transistorp. 198
6.2.4 Bulk-Driven Transistorsp. 199
6.3 Sub-1V Bandgap Voltage Reference by Resistive Divisionp. 199
6.3.1 Resistive Divided V BEp. 202
6.3.2 Independent Biased Resistive Divided V BEp. 206
6.4 Peaking Current Source and V BE Compensationp. 209
6.5 Weighted ¿ V GS Compensationp. 211
6.6 Summaryp. 214
6.7 Exercisesp. 215
Referencesp. 222
7 High Order Curvature Correctionp. 223
7.1 Compensation Orderp. 224
7.2 Second Order Temperature Compensationp. 228
7.2.1 Second Order Current Sourcep. 229
7.2.2 Current Subtractionp. 232
7.2.3 Current Additionp. 236
7.3 BJT Current Subtractionp. 238
7.4 Piecewise Linear Compensationp. 240
7.5 Sum and Difference of Sources with Similar Temperature Dependencep. 243
7.5.1 Difference of Voltages with Similar Temperature Dependencep. 244
7.5.2 Sum of Voltages with Inverted Temperature Dependencep. 245
7.5.3 Multi-threshold Voltages Curvature Compensated Voltage Referencep. 247
7.6 Summaryp. 252
7.7 Exercisesp. 253
Referencesp. 257
8 CMOS Voltage Reference without Resistorsp. 259
8.1 Generation of Weighted PTAT Source By Inverse Functionsp. 260
8.1.1 Weighted Differential Circuitp. 260
8.1.2 Negative Impedance Converterp. 262
8.2 Resistorless Voltage and Current Sourcesp. 265
8.2.1 Resistorless Voltage Sourcep. 265
8.2.2 Resistorless Current Sourcep. 266
8.3 First Order Compensated Resistorless Bandgap Voltage Reference Circuitp. 268
8.3.1 Voltage Summation Based Resistorless Reference Circuitp. 269
8.3.2 Current Summation Based Resistorless Reference Circuitp. 270
8.4 Resistorless Sub-Bandgap Reference Circuitp. 270
8.4.1 The Voltage Summation Approachp. 271
8.4.2 CTAT Voltage Reductionp. 273
8.5 Summaryp. 279
8.6 Exercisesp. 280
Referencesp. 281
A SPICE Model Filep. 283
B SPICE Netlist of Voltage Reference Circuitp. 287
Indexp. 289
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