Testability method at register transfer level (RTL) and gate level

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Title:

Testability method at register transfer level (RTL) and gate level

Personal Author:

Ng, Ka Huat, 1995-, author

Physical Description:

xvi, 47 pages : illustrations ; 27 cm

General Note:

Supervisor : Dr. Norlina Paraman

Also available in CD-ROM : CP 083111 ra

Fulltext is available at http://dms.library.utm.my:8080

Subject Term:

Integrated circuits -- Testing

Integrated circuits -- Computer-aided design

Added Author:

Norlina Paraman,

Added Corporate Author:

Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik

DSP_DISSERTATION:

Project Paper (Sarjana Muda Kejuruteraan (Elektrik – Elektronik)) - Universiti Teknologi Malaysia, 2019

Available:*

Library	Item Barcode	Call Number	Material Type	Item Category 1	Status
Searching... FKE Library	32030000002452	TK7874 N45 2019 raf	Closed Access Thesis	UTM Project Paper (Open Shelves)	Searching... Unknown
Searching... Perpustakaan Raja Zarith Sofiah	35000000033508	TK7874 N45 2019 raf	Closed Access Thesis	UTM Project Paper (Closed Access)	Searching... Unknown

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