Microsoft visual C++ : introductory edition for educational use only

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Title:

Personal Author:

Williams, Rob, 1948-

Publication Information:

Harlow, England: Addison-Wesley, 2001

Physical Description:

1 CD-ROM ;$ 12 cm

ISBN:

9780201648591

General Note:

Accompanies text with the title Computer systems architecture : a networking approach :(QA76.9.A73 W55 2001)

Available:*

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This textbook for a two-semester introductory course in networked computer systems moves through digital logic, hardware, layers of software, networking, and operating systems. Williams (University of the West of England) emphasizes how software performance can be dependent on hardware features. The

Author Notes

Dr Rob Williams is Head of the Computer Systems Technology School at the University of the West of England. He currently specialises in real-time systems

Preface	p. xiii
Recommended lab sessions	p. xix
Part 1 Basic functions and facilities of a computer
1 Introduction: the hardware--software interface	p. 3
1.1 Computer systems--the importance of networking	p. 4
1.2 Hardware and software--mutual dependence	p. 5
1.3 Programming your way into hardware--VHDL, a language for electronic engineers	p. 6
1.4 Systems administration--we all need to know	p. 9
1.5 Voice, image and data--technological convergence	p. 9
1.6 Windowing interfaces--WIMPs	p. 11
1.7 The global Internet--connecting all the networks	p. 13
1.8 Using the PC--a case study; more reasons to study CSA	p. 16
2 The von Neumann Inheritance	p. 23
2.1 Base 2--the convenience of binary--10110011100011110000	p. 24
2.2 Stored program control--general-purpose machines	p. 24
2.3 Instruction codes--machine action repertoire	p. 26
2.4 Translation--compilers and assemblers	p. 27
2.5 Linking--bringing it all together	p. 28
2.6 Interpreters--executing high-level commands	p. 30
2.7 Code sharing and reuse--let's not write it all again!	p. 31
2.8 Data codes--numeric and character	p. 32
2.9 The operating system--Unix and Windows	p. 36
2.10 Client--server computing--the way of the Net	p. 39
2.11 Reconfigurable hardware--an alternative to fetch--execute	p. 41
3 Functional units and the fetch--execute cycle	p. 47
3.1 The naming of parts--CPU, memory, IO units	p. 48
3.2 The CPU fetch--execute cycle--high-speed tedium	p. 51
3.3 System bus--synchronous or asynchronous?	p. 54
3.4 System clock--instruction cycle timing	p. 58
3.5 Pre-fetching--early efforts to speed things up	p. 60
3.6 Memory length--address width	p. 62
3.7 Endian-ness--Microsoft vs. Unix, or Intel vs. Motorola?	p. 64
3.8 Simple input--output--parallel ports	p. 66
4 Building computers from logic: the control unit	p. 71
4.1 Electronic Lego and logic--the advantage of modular units	p. 72
4.2 Basic logic gates--truth tables for AND, OR, XOR and NOT	p. 73
4.3 Truth tables and multiplexers--a simple but effective design tool	p. 74
4.4 Programmable logic--reconfigurable logic chips	p. 77
4.5 Traffic light controllers--impossible to avoid!	p. 78
4.6 Circuit implementation from truth tables--some practical tips	p. 81
4.7 Decoder logic--essential for control units and memories	p. 82
4.8 CPU control unit--the 'brain'	p. 85
4.9 Washing machine controllers--a simple CU	p. 85
4.10 RISC vs. CISC decoding--in search of faster computers	p. 88
5 Building computers from logic: the ALU	p. 95
5.1 De Morgan's equivalences--logical interchangeability	p. 96
5.2 Binary addition--half adders, full adders, parallel adders	p. 96
5.3 Binary subtraction--using two's complement integer format	p. 99
5.4 Binary shifting--barrel shifter	p. 101
5.5 Integer multiplication--shifting and adding	p. 103
5.6 Floating-point numbers--from very, very large to very, very small	p. 104
6 Building computers from logic: the memory	p. 115
6.1 Data storage--one bit at a time	p. 116
6.2 Memory devices--memory modules for computers	p. 118
6.3 Static memory--a lot of fast flip-flops	p. 119
6.4 Dynamic memory--a touch of analogue amid the digital	p. 120
6.5 DRAM refreshing--something else to do	p. 122
6.6 Page access memories--EDO and SDRAM	p. 122
6.7 Memory mapping--addressing and decoding	p. 126
6.8 IO port mapping--integration vs. differentiation	p. 129
7 The Intel Pentium CPU	p. 135
7.1 The Pentium--a high-performance microprocessor	p. 136
7.2 CPU registers--temporary store for data and address variables	p. 140
7.3 Instruction set--introduction to the basic Pentium set	p. 145
7.4 Structure of instructions--how the CU sees it	p. 147
7.5 CPU status flags--very short-term memory	p. 147
7.6 Addressing modes--building effective addresses	p. 150
7.7 Execution pipelines--the RISC speedup technique	p. 152
7.8 Microsoft Developer Studio--using the debugger	p. 154
8 Subroutines	p. 163
8.1 The purpose of subroutines--saving space and effort	p. 164
8.2 Return address--introducing the stack	p. 165
8.3 Using subroutines--HLL programming	p. 166
8.4 The stack--essential to most operations	p. 168
8.5 Passing parameters--localizing a subroutine	p. 169
8.6 Stack frame--all the local variables	p. 172
8.7 Supporting HLLs--special CPU facilities for dealing with subroutines	p. 175
8.8 Interrupt service routines--hardware-invoked subroutines	p. 175
8.9 Accessing operating system routines--late binding	p. 176
9 Simple input and output	p. 181
9.1 Basic IO methods--polling, interrupt and DMA	p. 182
9.2 Peripheral interface registers--the programmer's viewpoint	p. 183
9.3 Polling--single-character IO	p. 187
9.4 Interrupt processing--service on demand	p. 192
9.5 Critical data protection--how to communicate with interrupts	p. 200
9.6 Buffered IO--interrupt device drivers	p. 204
9.7 Direct memory access (DMA)--autonomous hardware	p. 205
9.8 Single-character IO--screen and keyboard routines	p. 207
10 Serial communications	p. 215
10.1 Serial transmission--data, signals and timing	p. 216
10.2 Timing synchronization--frequency and phase	p. 217
10.3 Data codes and error control--parity, checksums, Hamming codes and CRCs	p. 220
10.4 Flow control--hardware and software methods	p. 228
10.5 The 16550 UART--RS232	p. 230
10.6 The serial mouse--COM1 rodents	p. 235
10.7 Serial ports--practical tips, avoiding the frustration	p. 237
10.8 USB--Universal Serial Bus	p. 238
10.9 Modems--modulating carrier waves	p. 241
11 Parallel connections	p. 249
11.1 Parallel interfaces--better performance	p. 250
11.2 Centronics--more than a printer port but less than a bus	p. 250
11.3 SCSI--the Small Computer Systems Interface	p. 253
11.4 IDE--Intelligent Drive Electronics	p. 257
11.5 AT/ISA--a computer standards success story	p. 258
11.6 PCI--Peripheral Component Interconnection	p. 259
11.7 Plug-and-Play--automatic configuration	p. 262
11.8 PCMCIA--Personal Computer Memory Card International Association	p. 265
12 The memory hierarchy	p. 271
12.1 Levels of performance--you get what you pay for	p. 272
12.2 Localization of access--exploiting repetition	p. 273
12.3 Instruction and data caches--matching memory to CPU speed	p. 277
12.4 Cache mapping--direct or associative	p. 281
12.5 Virtual memory--segmentation and demand paging	p. 285
12.6 Address formulation--when, where and how much	p. 289
12.7 Hard disk usage--parameters, access scheduling and data arrangement	p. 290
12.8 Performance improvement--blocking, caching, defragmentation, scheduling, RAM disk	p. 294
12.9 Optical discs--CD-DA, CD-ROM, CD-RW and DVDs	p. 296
12.10 DVD--Digital Versatile Disc	p. 300
12.11 Floppy disks--waiting to be redeveloped	p. 300
Part 2 Networking and increased complexity
13 The programmer's viewpoint	p. 307
13.1 Different viewpoints--different needs	p. 308
13.2 Application user--office packages	p. 309
13.3 Systems administration--software installation and maintenance	p. 311
13.4 HLL programmer--working with Java, C++ or BASIC	p. 315
13.5 Systems programming--assembler and C	p. 318
13.6 Hardware engineer--design and hardware maintenance	p. 321
13.7 Layered virtual machines--hierarchical description	p. 322
13.8 Assemblers--simple translators	p. 324
13.9 Compilers--translation and more	p. 325
14 Local area networks	p. 331
14.1 Reconnecting the users--email, printers and database	p. 332
14.2 PC network interface--cabling and interface card	p. 336
14.3 Ethernet--carrier sense, multiple access/collision detect	p. 340
14.4 LAN addressing--logical and physical schemes	p. 344
14.5 Host names--another layer of translation	p. 348
14.6 Layering and encapsulation--TCP/IP software stack	p. 348
14.7 Networked file systems--sharing files across a network	p. 349
14.8 Interconnecting networks--gateways	p. 351
14.9 Socket programming--an introduction to WinSock	p. 351
15 Wide area networks	p. 359
15.1 The Internet--origins	p. 360
15.2 TCP/IP--the essential protocols	p. 362
15.3 TCP--handling errors and flow control	p. 365
15.4 IP routing--how packets find their way	p. 368
15.5 DNS--distributed name database	p. 374
15.6 World Wide Web--the start	p. 376
15.7 Browsing the Web--Netscape Navigator	p. 378
15.8 HTTP--another protocol	p. 380
15.9 Search engines--DEC AltaVista	p. 383
15.10 Open Systems Interconnect--an idealized scheme	p. 384
16 Other networks	p. 391
16.1 The PSTN--telephones	p. 392
16.2 Cellnets--providers of mobile communications	p. 398
16.3 ATM--asynchronous transfer mode	p. 407
16.4 Messaging--radio paging and packet radio networks	p. 411
16.5 ISDN--totally digital	p. 414
16.6 DSL--digital subscriber line	p. 417
16.7 Cable television--facilities for data transmission	p. 418
17 Introduction to operating systems	p. 425
17.1 Historic origins--development of basic functions	p. 426
17.2 Unix--a landmark operating system	p. 429
17.3 Outline structure--modularization	p. 431
17.4 Process management--initialization and dispatching	p. 432
17.5 Scheduling decisions--time-slicing, demand preemption or cooperative	p. 436
17.6 Task communication--pipes and redirection	p. 440
17.7 Exclusion and synchronization--semaphores and signals	p. 442
17.8 Memory allocation--malloc ( ) and free ( )	p. 448
17.9 User interface--GUIs and shells	p. 449
17.10 Input--output management--device handlers	p. 450
18 Windows NT	p. 457
18.1 Windows GUIs--responding to a need	p. 458
18.2 Win32--the preferred user API	p. 460
18.3 Processes and threads--multitasking	p. 461
18.4 Memory management--virtual memory implementation	p. 462
18.5 NT Registry--centralized administrative database	p. 462
18.6 NTFS--Windows NT file system	p. 464
18.7 File access--ACLs, permissions and security	p. 465
18.8 Sharing software components--OLE, DDE and COM	p. 467
18.9 Windows NT as a mainframe--Winframe terminal server	p. 468
19 Filing systems	p. 473
19.1 Data storage--file systems and databases	p. 474
19.2 The PC file allocation table and the directory	p. 481
19.3 Unix inodes--they do it differently	p. 484
19.4 Microsoft NTFS--complexity and security	p. 489
19.5 RAID configuration--more security for the disk subsystem	p. 490
19.6 File security--access controls	p. 492
19.7 CD portable file system--multi-session contents lists	p. 493
20 Visual output	p. 499
20.1 Computers and graphics--capture, storage, processing and redisplay	p. 500
20.2 PC graphics adapter cards--graphics coprocessors	p. 506
20.3 Laser printers--this is mechatronics!	p. 512
20.4 Adobe PostScript--a page description language	p. 513
20.5 WIMPs--remodelling the computer	p. 517
20.6 Win32--graphical API and more	p. 520
20.7 The X Window system--enabling distributed processing	p. 520
20.8 MMX technology--assisting graphical calculations	p. 522
21 RISC processors	p. 527
21.1 Justifying RISC--increased instruction throughput	p. 528
21.2 Pipeline techniques--more parallel operations	p. 533
21.3 Superscalar methods--parallel parallelism	p. 534
21.4 Register files--many more CPU registers	p. 535
21.5 Branch prediction methods--maintaining the pipelines	p. 537
21.6 Compiler support--an essential part of RISC	p. 538
21.7 Sun SPARC--scalar processor architecture as RISC	p. 539
21.8 Intel Itanium--the next generation	p. 540
21.9 Future processor design--debate	p. 545
22 The Motorola MC68300 microcontroller	p. 549
22.1 The MC68300--an example microcontroller and CISC processor	p. 550
22.2 MC68000 CPU--the CPU registers and their use	p. 552
22.3 MC68000 status register--communication flags	p. 554
22.4 Addressing modes--more power and complexity	p. 555
22.5 CISC designs--principal features	p. 558
22.6 MC68000 memory--family variations	p. 560
Appendix Microsoft Visual C++ Developer Studio	p. 567
Glossary	p. 583
Answers to end of chapter questions	p. 599
References	p. 645
Index	p. 647

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Table of Contents