Substrate noise coupling in analog/RF circuits

Library	Item Barcode	Call Number	Material Type	Item Category 1	Status
Searching... PSZ JB	30000010235917	TK7874.78 S83 2010	Open Access Book	Book	Searching... Unknown
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Substrate noise coupling - the coupling of signals from one node to another through a substrate - is a frequent problem that occurs in integrated circuits. This book offers guidance on the impact of substrate noise on various circuits operating from baseband frequencies up to mm-wave frequencies.

Author Notes

Stephane Bronckers is currently an EMC specialist at Laborelec, which is part of the GDF Suez Group. Dr. Bronckers has been a research assistant in the Department of Fundamental Electricity and Instrumentation at the Vrije Universiteit Brussels (VUB) and has worked at the Interuniversity Microelectronics Center (IMEC). He received an M.Sc. and a Ph.D. from the VUB.
Geert Van der Plas is a principal scientist at the Interuniversity Microelectronics Center (IMEC) in Belgium. He received an M.Sc. and a Ph.D. from the Katholieke Universities Leuven, Belgium.
Gerd Vandersteen is a professor in the Department of Electrical Measurement (ELEC) at the Vrije Universities Brussels, where he received a Ph.D. in electrical engineering.
Yves Rolain is a professor in the Department of Electrical Measurement (ELEC) at the Vrije Universiteit Brussels, where he received an M.S. in computer sciences and a Ph.D. in applied sciences.

Foreword	p. xiii
Preface	p. xv
Acknowledgments	p. xvii
Chapter 1 Introduction	p. 1
1.1 Introduction and Motivation	p. 1
1.2 Book overview	p. 4
References	p. 5
Chapter 2 Substrate Noise Propagation	p. 7
2.1 Introduction	p. 7
2.2 Modeling the Substrate	p. 8
2.2.1 Analytical Resistance Calculation Between Two Contacts	p. 9
2.2.2 Finite Difference Method	p. 13
2.2.3 Finite Element Method	p. 17
2.3 The Substrate Modeled with FDM	p. 19
2.3.1 Experimental Description	p. 19
2.3.2 Analysis of the Substrate Noise Propagation	p. 20
2.3.3 Conclusions	p. 27
2.4 The Substrate as a Finite Element Model	p. 28
2.4.1 Simulation Methodology	p. 28
2.4.2 Dealing with N-Doped Regions	p. 30
2.4.3 Simulation Setup for the Test Structure	p. 33
2.4.4 Comparison	p. 33
2.4.5 Conclusions	p. 33
2.5 Conclusions	p. 34
References	p. 36
Chapter 3 Passive Isolation Structures	p. 39
3.1 Introduction	p. 39
3.2 Overview and Description of the Different Types of Passive Isolation Structures	p. 40
3.2.1 The Template Layout	p. 42
3.2.2 Integrating the Different Types of Guard Rings	p. 43
3.2.3 Simulation Setup	p. 44
3.3 Prediction and Understanding of Guard Rings	p. 44
3.3.1 Reference Structure	p. 45
3.3.2 P-Well Block Isolation	p. 47
3.3.3 N-Well Isolation	p. 50
3.3.4 P + Guard Ring Shielding	p. 52
3.3.5 Triple Well Shielding	p. 56
3.3.6 Comparison and Conclusion	p. 60
3.4 Design of an Efficient P + Guard Ring	p. 65
3.4.1 Impedance of the Ground Interconnect	p. 65
3.4.2 Width of the P + Guard Ring	p. 67
3.4.3 Distance to the Victim	p. 70
3.4.4 Guidelines for Good P + Guard Ring Design	p. 75
3.5 Conclusions	p. 76
References	p. 77
Chapter 4 Noise Coupling in Active Devices	p. 79
4.1 Introduction	p. 79
4.2 Substrate Noise Impact on Analog Design	p. 80
4.3 Impact Simulation Methodology	p. 82
4.3.1 EM Simulation	p. 83
4.3.2 Circuit Simulation	p. 86
4.4 Transistor Test Bench	p. 86
4.4.1 Description of the Transistor Under Test	p. 87
4.4.2 Modeling the Transistor Test Bench	p. 87
4.4.3 Experimental Validation	p. 92
4.5 Substrate Noise Coupling Mechanisms in a Transistor	p. 92
4.5.1 Analyzing the Different Coupling Mechanisms in a Transistor	p. 94
4.5.2 Description and Measurement of the Device Under Test	p. 97
4.5.3 Modeling Different Substrate Noise Coupling Mechanisms	p. 100
4.5.4 Quantifying the Different Substrate Noise Coupling Mechanisms	p. 104
4.5.5 Experimental Validation of the Substrate Noise Coupling Mechanisms	p. 106
4.6 Conclusions	p. 108
References	p. 109
Chapter 5 Measuring the Coupling Mechanisms in Analog/RF Circuits	p. 111
5.1 Introduction	p. 111
5.2 Measurement-Based Identification of the Dominant Substrate Noise Coupling Mechanisms	p. 114
5.2.1 Measurement of the Different Spurs	p. 115
5.2.2 Sensitivity Functions	p. 116
5.2.3 Determining the Influence of the PCB	p. 118
5.3 Example: 900 MHz LC-VCO	p. 119
5.3.1 Description of the LC-VCO	p. 119
5.3.2 Substrate Sensitivity Measurements	p. 120
5.3.3 Revealing the Dominant Coupling Mechanism for FM Spurs	p. 123
5.3.4 Revealing the Dominant Coupling Mechanism for AM Spurs	p. 128
5.3.5 Influence of the PCB Decoupling Capacitors on the Substrate Noise Impact	p. 130
5.3.6 Conclusions	p. 132
5.4 Study of the Coupling Mechanisms Between a Power Amplifier and an LC-VCO	p. 133
5.4.1 Description of the Design of the PPA and the LC-VCO	p. 135
5.4.2 Coupling Mechanisms Between the PPA and the LC-VCO	p. 137
5.4.3 Measuring the Dominant Coupling Mechanisms	p. 142
5.4.4 Conclusions	p. 146
5.5 Conclusions	p. 148
References	p. 148
Chapter 6 The Prediction of the Impact of Substrate Noise on Analog/RF Circuits	p. 151
6.1 Introduction	p. 151
6.2 The Substrate Modeled with FDM	p. 152
6.2.1 Impact Simulation Methodology	p. 152
6.2.2 Prediction of the Impact of Substrate Noise from DC Up to LO Frequency	p. 156
6.2.3 Experimental Validation of the Simulation Methodology	p. 160
6.2.4 Conclusions	p. 162
6.3 Substrate Modeled by the FEM Method	p. 163
6.3.1 Impact Simulation Methodology	p. 163
6.3.2 Prediction of the Impact of Substrate Noise	p. 166
6.3.3 Verification with Measurements	p. 170
6.3.4 Conclusions	p. 172
6.4 Techniques to Reduce Substrate Noise Coupling	p. 173
6.4.1 Layout Techniques to Reduce the Substrate Noise Coupling	p. 174
6.4.2 Circuit Techniques to Reduce the Substrate Noise Coupling	p. 175
6.4.3 3D Stacking as a Solution to Substrate Noise Issues	p. 179
6.4.4 Separated Analog/Digital Ground	p. 185
6.4.5 Shared Analog/Digital Ground	p. 186
6.4.6 Experimental Validation	p. 186
6.4.7 Conclusions	p. 190
6.5 Conclusions	p. 191
References	p. 192
Chapter 7 Noise Coupling in Analog/RF Systems	p. 195
7.1 Introduction	p. 195
7.2 Impact Simulation Methodology	p. 196
7.2.1 EM Simulation	p. 198
7.2.2 Parasitic Extraction	p. 200
7.2.3 Circuit Simulation	p. 200
7.3 Analyzing the Impact of Substrate Noise in Analog/RF Systems	p. 201
7.3.1 Analysis of the Propagation of Substrate Noise	p. 202
7.3.2 Analyzing the Substrate Noise Coupling	p. 202
7.4 Substrate Noise Impact on a 48-53 GHz LC-VCO	p. 203
7.4.1 Description of the LC-VCO	p. 203
7.4.2 Simulation Setup	p. 203
7.4.3 Conclusion	p. 207
7.5 Impact of Substrate Noise on a DC to 5 GHz Wideband Receiver	p. 208
7.5.1 Description of the Wideband Receiver	p. 208
7.5.2 Simulation Setup	p. 211
7.5.3 Parasitic Extraction	p. 214
7.5.4 Circuit Simulation	p. 214
7.5.5 Revealing the Dominant Coupling Mechanism	p. 215
7.5.6 Experimental Verification	p. 220
7.6 Conclusions and Discussion	p. 222
7.6.1 Conclusions	p. 222
7.6.2 Discussion	p. 223
References	p. 224
Appendix A Narrowband Frequency Modulation of LC-Tank VCOs	p. 227
Appendix B Port Conditions	p. 231
List of Acronyms	p. 233
About the Authors	p. 237
Index	p. 239

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