Digital design : from gates to intelligent machines

This book is a comprehensive introduction to the science and art of designing digital circuits. It begins by describing two foundational topics, numbers systems and boolean algebra. These topics then form the basis for the introduction of simple combinational circuits, or circuits without a memory. Complex circuits of this form are then described. It is shown, for example, how to construct a carry-look-ahead adder from elementary logic gates. Sequential digital circuits, or circuits with memories, are then treated, with the emphasis on sequential design. These topics then allow the introduction of a simple but operational digital computer that includes an arithmetic logic unit (ALU). The book concludes by showing that many of the principles developed in earlier chapters can be applied to the construction of intelligent machines.

Preface	p. xvii
1 Numbers and Number Systems	p. 1
Introduction	p. 1
Numbers	p. 4
Positional Number Systems and Bases	p. 5
Conversions Between Bases	p. 8
Conversions to and from Other Bases to Base 10	p. 9
Binary Number Systems	p. 11
Binary Addition and Subtraction	p. 12
Binary Multiplication	p. 15
Negative Numbers in Binary: Signed Magnitude and Two's Complement	p. 15
Codes	p. 18
BCD	p. 18
Gray Coding	p. 19
Parity	p. 20
ASCII and Unicode	p. 20
Summary	p. 22
Exercises	p. 22
LATTICE Exercises	p. 23
2 Boolean Algebra	p. 25
Introduction	p. 25
Logical Functions in Boolean Algebra	p. 26
Truth Tables	p. 29
Tautology, Equivalence, and Logical Laws	p. 31
Other Useful Logical Operators	p. 33
Simplification	p. 34
Simplification with Logical Laws	p. 35
Minterms and Maxterms	p. 37
Karnaugh Maps and Minimization	p. 42
Summary	p. 50
Exercises	p. 51
LATTICE Exercises	p. 53
3 Elementary Combinational Circuits	p. 55
Introduction	p. 55
Logic, Gates, and Circuits	p. 56
Elementary Gates	p. 56
Circuits to Functions and Truth Tables	p. 59
Realizing a Function Directly	p. 61
Realizing a Circuit Through Minterms and Maxterms	p. 63
Alternative Representations of SOP and POS Functions	p. 64
Realizing a Minimized Form of a Function	p. 66
Gates and Integrated Circuits in Practice	p. 67
Logic Technologies and Logic Families	p. 68
Values and Voltages	p. 69
Fan-In and Fan-Out	p. 70
Gate Delays and Circuit Delays	p. 72
Implementation of Gates	p. 74
Summary	p. 78
Exercises	p. 78
LATTICE Exercises	p. 80
4 Complex Combinational Circuits	p. 81
Introduction	p. 81
Binary Adders	p. 82
Full Adder	p. 82
Ripple-Carry Adder	p. 85
Carry-Look-Ahead Adder	p. 86
Two's Complement Addition and Subtraction	p. 88
Decoders and Encoders	p. 90
Binary Decoders	p. 91
Decoder Applications	p. 95
Encoders	p. 97
Multiplexers and Demultiplexers	p. 100
Programmable Logic Devices (PLDs)	p. 107
Programmable Read Only Memory (PROM)	p. 107
Programmable Array Logic (PAL)	p. 108
Programmable Logic Array (PLA)	p. 109
Summary	p. 112
Exercises	p. 114
LATTICE Exercises	p. 116
5 Elements of Sequential Design	p. 117
Introduction	p. 117
Latches	p. 119
SR Latch	p. 119
D Latch	p. 123
Flip-Flops	p. 125
Edge-Triggered D Flip-Flop	p. 125
Edge-Triggered J-K Flip-Flop	p. 127
Registers	p. 130
Parallel-Load Registers	p. 130
Shift Registers	p. 132
Summary	p. 134
Exercises	p. 134
LATTICE Exercises	p. 137
6 Sequential Machines	p. 139
Introduction	p. 139
Finite State Machines	p. 140
Mealy and Moore Machines	p. 144
Sequential Machine Analysis	p. 145
Sequential Machine Synthesis	p. 150
General Method	p. 150
The Parity Example	p. 153
A Sequence Recognition Example	p. 157
A Maze Example	p. 162
Designing with J-K Flip-Flops	p. 170
Summary	p. 174
Exercises	p. 175
LATTICE Exercises	p. 177
7 Elements of Computer Design	p. 179
Introduction	p. 179
Computer Organization	p. 182
Memory	p. 183
The CPU	p. 189
I/O	p. 191
Summary	p. 193
Exercises	p. 194
LATTICE Exercises	p. 195
8 The Design of a Simple CPU and Computer	p. 197
Introduction	p. 197
The Register Set	p. 198
The Instruction Set	p. 201
The Control Unit	p. 204
The Fetch-Decode-Execute Cycle	p. 205
The Control Unit Finite State Machine	p. 207
Data Paths	p. 210
The ALU	p. 214
Putting It All Together	p. 218
Further Issues in Computer Design	p. 223
Microsequencing	p. 224
Interrupts	p. 224
RISC and Pipelining	p. 225
High-Level Languages	p. 226
Summary	p. 226
Exercises	p. 227
LATTICE Exercises	p. 228
9 Explorations in Digital Intelligence	p. 229
Introduction	p. 229
Pattern Recognition	p. 232
Pattern Completion	p. 235
Interference and Expert Systems	p. 236
Neural Networks	p. 240
Learning	p. 249
Search	p. 254
Emergent Behavior	p. 256
Summary	p. 259
LATTICE Exercises	p. 260
Appendix The LATTICE System	p. 263
Introduction	p. 263
Installation	p. 264
System Requirements	p. 264
Installation Procedure	p. 264
General Operation	p. 265
Program Layout	p. 265
File Menu Options	p. 265
Animation Options	p. 266
Mouse Buttons	p. 266
Truth Systems	p. 267
Variable Drop-Down Box	p. 267
Operator Drop-Down Box	p. 268
Truth Table Options (Bottom of Screen)	p. 269
Variable Settings Dialog Box	p. 269
State Systems	p. 270
Column 1 (State Color)	p. 271
Column 2 (State Action)	p. 271
Column 3 (State Name)	p. 273
Columns 4 Through the End of the Table (State Transitions)	p. 273
State Variable Settings	p. 273
State Table Options (Bottom of Screen)	p. 275
Tricks of the Trade	p. 275
System Submission	p. 277
Index	p. 279

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