Cover image for Designing of pulse coded neural network chip controller using FPGA
Title:
Designing of pulse coded neural network chip controller using FPGA
Personal Author:
Chang, Wooi Po
Publication Information:
Skudai : Universiti Teknologi Malaysia, 1999
Subject Term:
Artificial neural networks

Logic circuits
DSP_DISSERTATION:
Project Paper (Bachelor of Electrical Engineering (Instrumentation & Control)) - Universiti Teknologi Malaysia, 1999

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 30000004473066 QA76.87 C55 1999 Closed Access Thesis UTM Project Paper (Closed Access)
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