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Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
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Searching... | 30000010167353 | TK7895.E42 C64 2008 | Open Access Book | Book | Searching... |
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Summary
Summary
This fascinating new work comes complete with more than 100 illustrations and a detailed practical prototype. It explores the domains encountered when designing a distributed embedded computer control system as an integrated whole. Basic issues about real-time systems and their properties, especially safety, are examined first. Then, system and hardware architectures are dealt with, along with programming issues, embodying desired properties, basic language subsets, object orientation and language support for hardware and software specifications.
Author Notes
Professor Colnaric has been involved in real-time research for more than fifteen years. Before that, he worked on practical industrial projects mainly designing embedded operating system kernels and other system software. Most of his research papers, co-authored with Professor Halang, have been practically oriented and some were published in Control Engineering Practice , Real-Time Systems and Annual Reviews in Control . Their book chapters have been published by Kluwer and World Scientific. Following work in the late 90s in embedded computer systems in process control and mechatronic systems he wrote a textbook on digital systems in computing (in Slovene) which is being used in the undergraduate programme of computer science at the University of Maribor. He has authored or co-authored about eighty peer-reviewed contributions to conferences.
Professor Colnaric founded and is the current chairman of the Real-Time Systems Laboratory at the Faculty of Electrical Engineering and Computer Science. He teaches courses in real-time systems, digital systems, microprocessors, and data structures and algorithms.
Beginning in 1994, he has led several scientific projects financed by Slovenian Government. In the years 2002-2005 his group participated in a 5th FW European project IFATIS dealing with intelligent fault tolerant control, designing and building a distributed embedded platform.
Matjaž Colnaric is a member of IFAC and active in its Technical Committee 3.1: Computers and Control. He is one of the four working group leaders, concerned with safety issues. He was a programme committee member for many years, and in the last two years has been the chairman of the IFAC/IFIP/IEEE Workshop on Real-Time Programming, the longest-standing conference in this area (29 years).
Professor Colnaric is one of the Editors of the journal Computing and Information Technology published by the University of Zagreb, Croatia, and is aneditorial board member of Springer's Real-Time Systems journal and of Oldenbourg's atp International , the new international edition of the well-known German journal of practical automation.
Dr. Domen Verber is a member of the Real-time Systems Laboratory and gives the course in microprocessors and is leading laboratory work for students. He has co-authored a number of joint publications and has led a scientific project financed by the Slovenian government.
Prof. Wolfgang A. Halang is a well-known scientist in the domain of real-time system design. He is Dean of Faculty of Electrical and Computer Engineering at FernUniversität in Hagen in Germany. He has (co-) written 7 books, including the Springer titles Genetic Algorithms for Control and Signal Processing and Integration of Fuzzy Logic and Chaos Theory and a very large number of journal and conference papers. He is Editor of Springer's Real-Time Systems journal and is on the editorial board of Multimedia Tools and Applications (Springer), Real-Time Imaging (Elsevier), High Integrity Systems (OUP) and IEEE Concurrency . Professor Halang has also guest-edited numerous journal special issues. He is chairman of the Coordinating Committee of Computers, Cognition and Communications, an important position within IFAC serving on many conference program committees and giving dozens of invited lectures to audiences both industrial and academic.
Prof. Halang has rich industrial experience, having worked in the process industry (Coca Cola and Bayer). He holds doctorates in mathematics and in computer science. He has organised a large number of scientific conferences and participated in important scientific and industrial projects.
Table of Contents
Part I Concepts | |
1 Real-time Characteristics and Safety of Embedded Systems | p. 3 |
1.1 Introduction | p. 3 |
1.2 Real-time Systems and their Properties | p. 5 |
1.2.1 Definitions, Classification and Properties | p. 6 |
1.2.2 Problems in Adequate Implementation of Embedded Applications and General Guidelines | p. 10 |
1.3 Safety of Embedded Computer Control Systems | p. 13 |
1.3.1 Brief History of Safety Standards Relating to Computers in Control | p. 16 |
1.3.2 Safety Integrity Levels | p. 19 |
1.3.3 Dealing with Faults in Embedded Control Systems | p. 21 |
1.3.4 Fault-tolerance Measures | p. 23 |
1.4 Summary of Chapter 1 and Synopsis of What Follows | p. 28 |
2 Multitasking | p. 29 |
2.1 Task Management Systems | p. 29 |
2.1.1 Cyclic Executive | p. 30 |
2.1.2 Asynchronous Multitasking | p. 32 |
2.2 Scheduling and Schedulability | p. 34 |
2.2.1 Scheduling Methods and Techniques | p. 35 |
2.2.2 Deadline-driven Scheduling | p. 39 |
2.2.3 Sufficient Condition for Feasible Schedulability Under Earliest Deadline First | p. 41 |
2.2.4 Implications of Employing Earliest Deadline First Scheduling | p. 45 |
2.2.5 Rate Monotonic vs Earliest Deadline First Scheduling | p. 46 |
2.3 Synchronisation Between Tasks | p. 50 |
2.3.1 Busy Waiting | p. 51 |
2.3.2 Semaphores | p. 53 |
2.3.3 Bolts | p. 54 |
2.3.4 Monitors | p. 55 |
2.3.5 Rendezvous | p. 56 |
2.3.6 Bounding Waiting Times in Synchronisation | p. 57 |
3 Hardware and System Architectures | p. 61 |
3.1 Undesirable Properties of Conventional Hardware Architectures and Implementations | p. 62 |
3.1.1 Processor Architectures | p. 63 |
3.1.2 System Architectures | p. 67 |
3.2 Top-layer Architecture: An Asymmetrical Multiprocessor System | p. 69 |
3.2.1 Concept | p. 70 |
3.2.2 Operating System Kernel Processor | p. 73 |
3.2.3 Task Processor | p. 78 |
3.3 Implementation of Architectural Models | p. 82 |
3.3.1 Centralised Asymmetrical Multiprocessor Model | p. 83 |
3.3.2 Distributed Multiprocessor Model | p. 86 |
3.4 Intelligent Peripheral Interfaces for Increased Dependability and Functionality | p. 86 |
3.4.1 Higher-level Functions of the Intelligent Peripheral Interfaces | p. 88 |
3.4.2 Enhancing Fault Tolerance | p. 89 |
3.4.3 Support for Programmed Temporal Functions | p. 90 |
3.4.4 Programming Peripheral Interfaces | p. 93 |
3.5 Adequate Data Transfer | p. 93 |
3.5.1 Real-time Communication | p. 94 |
3.5.2 Time-triggered Communication | p. 95 |
3.5.3 Fault Tolerance in Communication | p. 98 |
3.5.4 Distributed Data Access: Distributed Replicated Shared Memory | p. 100 |
4 Programming of Embedded Systems | p. 107 |
4.1 Properties Desired of Control Systems Development | p. 111 |
4.1.1 Support for Time and Timing Operations | p. 111 |
4.1.2 Explicit Representation of Control System Entities | p. 116 |
4.1.3 Explicit Representation of Other Control System Entities | p. 119 |
4.1.4 Support for Temporal Predictability | p. 120 |
4.1.5 Support for Low-level Interaction with Special-purpose Hardware Devices | p. 121 |
4.1.6 Support for Overload Prevention | p. 124 |
4.1.7 Support for Handling Faults and Exceptions | p. 124 |
4.1.8 Support for Hardware/Software Co-implementation | p. 130 |
4.1.9 Other Capabilities | p. 132 |
4.2 Time Modeling and Analysis | p. 132 |
4.2.1 Execution Time Analysis of Specifications | p. 135 |
4.2.2 Execution Time Analysis of Source Code | p. 136 |
4.2.3 Execution Time Analysis of Executable Code | p. 140 |
4.2.4 Execution Time Analysis of Hardware Components | p. 141 |
4.2.5 Direct Measurement of Execution Times | p. 142 |
4.2.6 Programming Language Support for Temporal Predictability | p. 144 |
4.2.7 Schedulability Analysis | p. 147 |
4.3 Object-orientation and Embedded Systems | p. 149 |
4.3.1 Difficulties of Introducing Object-orientation to Embedded Real-time Systems | p. 150 |
4.3.2 Integration of Objects into Distributed Embedded Systems | p. 150 |
4.4 Survey of Programming Languages for Embedded Systems | p. 156 |
4.4.1 Assembly Language | p. 157 |
4.4.2 General-purpose Programming Languages | p. 158 |
4.4.3 Special-purpose Real-time Programming Languages | p. 160 |
4.4.4 Languages for Programmable Logic Controllers | p. 163 |
Part II Implementation | |
5 Hardware Platform | p. 169 |
5.1 Architecture | p. 169 |
5.2 Communication Module Used in Processing and Peripheral Units | p. 171 |
5.3 Fault Tolerance of the Hardware Platform | p. 175 |
5.4 System Software of the Experimental Platform | p. 176 |
6 Implementation of a Fault-tolerant Distributed Embedded System | p. 181 |
6.1 Generalised Model of Fault-tolerant Real-time Control Systems | p. 182 |
6.2 Implementation of Logical Structures on the Hardware Platform | p. 185 |
6.3 Partial Implementation in Firmware | p. 187 |
6.3.1 Communication Support Module | p. 188 |
6.3.2 Supporting Middleware for Distributed Shared Memory | p. 189 |
6.3.3 Kernel Processor | p. 190 |
6.3.4 Implementation of Monitoring, Reconfiguration and Mode Control Unit | p. 195 |
6.4 Programming of the FTCs | p. 196 |
6.4.1 Extensions to MATLAB®/Simulink® Function Block Library | p. 196 |
6.4.2 Generation of Time Schedules for the TTCAN Communication Protocol | p. 197 |
6.4.3 Development Process | p. 199 |
7 Asynchronous Real-time Execution with Runtime State Restoration by Martin Skambraks | p. 201 |
7.1 Design Objectives | p. 201 |
7.2 Task-oriented Real-time Execution Without Asynchronous Interrupts | p. 202 |
7.2.1 Operating Principle | p. 203 |
7.2.2 Priority Inheritance Protocol | p. 206 |
7.2.3 Aspects of Safety Licensing | p. 211 |
7.2.4 Fragmentation of Program Code | p. 213 |
7.3 State Restoration at Runtime | p. 220 |
7.3.1 State Restoration at Runtime and Associated Problems | p. 222 |
7.3.2 Classification of State Changes | p. 226 |
7.3.3 State Restoration with Modification Bits | p. 227 |
7.3.4 Concept of State Restoration | p. 229 |
7.3.5 Influence on Program Code Fragmentation and Performance Aspects | p. 233 |
8 Epilogue | p. 237 |
References | p. 241 |
Index | p. 247 |