Title:
VHDL modelling and asic design of a shortest-path processor core for network routing
Personal Author:
Publication Information:
Skudai : Universiti Teknologi Malaysia, 2003
DSP_DISSERTATION:
Thesis (Master of Engineering (Electrical)) - Universiti Teknologi Malaysia, 2003
Available:*
Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
|---|---|---|---|---|---|
Searching... | FKE30000000784 | TK7885.7 T46 2003 | Closed Access Thesis | UTM Master Thesis (Closed Access) | Searching... |
Searching... | 30000010028034 | TK7885.7 T46 2003 | Closed Access Thesis | UTM Master Thesis (Closed Access) | Searching... |
Searching... | SPS30000001088 | TK7885.7 T46 2003 raf | Closed Access Thesis | UTM Master Thesis (Closed Access) | Searching... |
