Memory systems : cache, DRAM, disk

Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem. The book tells you everything you need to know about the logical design and operation, physical design and operation, performance characteristics and resulting design trade-offs, and the energy consumption of modern memory hierarchies. You learn how to to tackle the challenging optimization problems that result from the side-effects that can appear at any point in the entire hierarchy.As a result you will be able to design and emulate the entire memory hierarchy.

Author Notes

Bruce Jacob is an Associate Professor of Electrical and Computer Engineering at the University of Maryland, College Park. He received his Ars Baccalaureate, cum laude, in Mathematics from Harvard University in 1988, and his M.S. and Ph.D. in Computer Science and Engineering from the University of Michigan in 1995 and 1997, respectively. In addition to his academic credentials, he has extensive experience in industry: he designed real-time embedded applications and real-time embedded architectures in the area of telecommunications for two successful Boston-area startup companies, Boston Technology (now part of Comverse Technology) and Priority Call Management (now part of uReach Technologies). At Priority Call Management he was employee number 2, the system architect, and the chief engineer; he built the first working prototype of the company's product, and he built and installed the first actual product as well.

Spencer Ng is a senior technical staff member with Hitachi Global Storage Technologies. Prior to that, he was a research staff member with IBM Almaden Research Center. Before joining IBM, he was a member of technical staff with Bell Labs in Naperville, Illinois. He has been a researcher in the field of storage for over twenty years, and is the holder of about twenty issued U.S. patents. For the past fifteen years, he is heavily involved in studying and developing various techniques for improving disk drive performance.

David Wang received his PhD from the University of Maryland in 2005. David's primary research interest is into power efficient, high performance memory systems that use commodity DRAM devices. As part of his research, David has collaborated with memory system architects and design engineers, and presented his work to JEDEC in support of proposals for future generation DRAM device specifications. David is presently working as an architect for MetaRAM, a memory systems startup in the Silicon Valley.

Overview: On the Topic of Memory Systems and Their Design ▪

Part I: Cache Ch.

1 An Overview of Cache Principles

2 Logical Organization

3 Management of Cache Contents

4 Cache Cohenrence

5 Implementation Issues

6 Cache Case Studies

Part II DRAM

7 Memory Systems Overview

8 DRAM Device: Basic Circuits and Architecture

9 DRAM System Signalling and Timing

10 DRAM Memory System Organization

11 Generic DRAM Memory Access Protocol

12 Evolution of DRAM Devices

13 DRAM Memory Controller

14 Memory System Design Analysis

Part II Disk

15 Overview of Disks

16 The Physical Layer

17 The Data Layer

18 Performance Issues and Design Tradeoffs

19 Drive Interface

20 Operational Performance Improvement

21 The Cache Layer

23 Performance Testing

24 Storage Subsystems

25 Advanced Topics

26 Case Study

Part IV Cross-Cutting Issues

27 The Holistic Design of Memory Hierarchies

28 Analysis of Cost and Performance

29 Power and Energy

30 Reliability

31 Virtual Memory

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Summary

Summary

Author Notes

Table of Contents