Cover image for A VHDL module generator for fast prototyping of multimedia data processing ASICs
Title:
A VHDL module generator for fast prototyping of multimedia data processing ASICs
Personal Author:
Series:
Siri kertas kerja penyelidikan (Universiti Teknologi Malaysia. Pusat Pengurusan Penyelidikan)
Publication Information:
Skudai : Universiti Teknologi Malaysia, 1999
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30000004536151 TK7885.7 M53 1999 Closed Access Book 1:BOOK_ARC
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30000004536110 TK7885.7 M53 1999 Open Access Book Proceedings, Conference, Workshop etc.
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30000004536078 TK7885.7 M53 1999 Open Access Book Proceedings, Conference, Workshop etc.
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30000004536037 TK7885.7 M53 1999 Open Access Book Book
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