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Summary
Summary
The explosive growth and development of the integrated circuit market over the last few years have been mostly limited to the digital VLSI domain. The difficulty of automating the design process in the analog domain, the fact that a general analog design methodology remained undefined, and the poor performance of earlier tools have left the analog world with few, if any, options for automated VLSI design.
Analog VLSI Design Automation may well mark the dawn of a new era. It describes a fully integrated, top-down approach to analog VLSI design automation and presents a methodology for each level of the design hierarchy. The authors define an analog VLSI design automation flow in which every tool has its predefined objectives and interfaces. They present working examples for each tool, and demonstrate the validity of their approach by running their design automation system from the top to the bottom levels in three different case studies.
Technologies like systems-on-a-chip (SOCs) have created a pressing need for automated design tools capable of handling analog circuit blocks. The ideas presented in this book are fully adaptable to various design classes. Using these ideas, you will be able to develop new methodologies and algorithms that will significantly reduce design costs and time to market for many practical systems.
Author Notes
Sina Balkir is with the Department of Electrical Engineering, University of Nebraska-Lincoln, USA
Gunhan Dundar: Since 1994, he has been with Bogazici University, where he is currently a professor
Arif Selcuk Ogrenci is an assistant professor in the Electronics Engineering Department at Kadir Has University, Istanbul, Turkey
Table of Contents
1 Analog VLSI Design Automation | p. 1 |
1.1 Introduction | p. 1 |
1.2 Previous Analog Design Flows | p. 3 |
1.3 Proposed Design Flow and Tools | p. 9 |
1.3.1 System-Level Synthesis | p. 9 |
1.3.2 Circuit-Level Synthesis | p. 11 |
1.3.3 Layout-Level Synthesis | p. 12 |
1.3.4 Performance Estimation | p. 12 |
1.3.5 Layout Advisor | p. 13 |
1.3.6 Library | p. 13 |
1.3.7 Circuit Extractor and Simulator | p. 14 |
1.4 Design Examples | p. 14 |
1.4.1 Switched Capacitor (SC) Filters | p. 14 |
1.4.2 Analog Neural Networks | p. 15 |
1.4.3 Analog-to-Digital Converters (ADC) | p. 18 |
2 System-Level Design Automation | p. 23 |
2.1 Introduction | p. 23 |
2.2 Performance Estimation | p. 25 |
2.2.1 Estimation Methodology Used in the Book | p. 27 |
2.2.2 A BTS Opamp Estimation Example | p. 29 |
2.3 Macromodeling | p. 33 |
2.4 High-Level Synthesis of Switched Capacitor Filters | p. 34 |
2.5 High-Level Synthesis of Analog Neural Networks | p. 42 |
2.5.1 System-Level Modeling | p. 49 |
2.5.2 Numerical Examples | p. 55 |
2.5.3 Results and Conclusion | p. 55 |
2.6 High Level Synthesis of A/D Converters | p. 59 |
3 Circuit Level Synthesis | p. 85 |
3.1 Introduction | p. 85 |
3.1.1 Survey of Existing Synthesis Approaches | p. 87 |
3.1.2 Evolutionary Computation for Analog Synthesis | p. 94 |
3.2 Evolution-Based Automatic Synthesis Strategy | p. 96 |
3.3 Evolution-Based Analog IC Optimization | p. 98 |
3.3.1 Circuit Representation | p. 99 |
3.3.2 Cost Function | p. 100 |
3.3.3 Description of the Algorithm | p. 101 |
3.4 DC Simulator | p. 103 |
3.5 Performance Modeling | p. 104 |
3.6 Incorporation of transistor mismatches | p. 109 |
3.6.1 Prediction of Mismatch | p. 110 |
3.6.2 Modeling the Circuit-Level Performance Variations | p. 111 |
3.6.3 Incorporation of Mismatch into the Optimization System | p. 111 |
3.7 Synthesis Examples and Discussion of Results | p. 112 |
3.7.1 Synthesis Examples | p. 113 |
3.7.2 Validation on Silicon | p. 118 |
3.7.3 Discussion of Results | p. 119 |
3.8 Concluding Remarks | p. 121 |
4 Layout-Level Design Automation | p. 129 |
4.1 Introduction | p. 129 |
4.2 Device Generation | p. 136 |
4.3 Partitioning and Floorplanning | p. 143 |
4.4 Placement | p. 150 |
4.5 Routing | p. 154 |
4.6 Post Layout Improvements | p. 157 |
4.7 Performance Issues in Analog Layout Generation | p. 159 |
4.8 Conclusions and Future Directions | p. 163 |
5 Design Automation Case Studies | p. 173 |
5.1 Introduction | p. 173 |
5.2 SC Filter Design Example | p. 174 |
5.2.1 Design Specifications and High-Level Synthesis | p. 176 |
5.2.2 Circuit and Layout Level Synthesis Results | p. 177 |
5.3 Neural Network Design Example | p. 181 |
5.3.1 ANN Building Blocks | p. 182 |
5.3.2 Synthesis Test Results | p. 189 |
5.3.3 Concluding Remarks | p. 191 |
5.4 A/D Converter Design Example | p. 193 |
5.4.1 Flash Module | p. 194 |
5.4.2 Pipeline Module | p. 200 |
6 Conclusion and Future Directions | p. 211 |
Appendix A CMOS Spice Models | p. 215 |
Index | p. 217 |