Cover image for Synthesizeable VHDL generation from real-time object-oriented modeling
Title:
Synthesizeable VHDL generation from real-time object-oriented modeling
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Publication Information:
Ann Arbor, Mich. : UMI, 1997
DSP_DISSERTATION:
Thesis (MSc) - Royal Military College of Canada, 1997

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30000004284851 QA76.64 C53 1998 r Reference Book 1:BOOKREF
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