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Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
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Searching... | 30000000213490 | QA76.5 D33 1989 | Open Access Book | Book | Searching... |
Searching... | 30000000853535 | QA76.5 D33 1989 | Open Access Book | Book | Searching... |
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Choice Review
A valuable in-depth reference on hardware issues relating to parallel processing. Overall, DeCegama has done a good job of giving taxonomy and structure to the vast, highly interrelated, and complex field of parallel architecture. He provides a comprehensive survey of the parallel architectures; in addition to the traditional SIMD, MIMD, and pipelined architectures, he describes associative arrays, systolic arrays, VLIW machines, and data-flow machines. Various interconnection strategies are described, as well as an analysis of the behavior of each interconnection network under load. The chapter on hardware issues in parallel processing focuses on processes, memory, and network implementations. The impact of implementation technology on architecture is considered. Topics of interest in this chapter include a comparison of CISC versus RISC, cache-management schemes, and bus and multistage network implementation. A persistent theme is that of tradeoff among physical implementation constraint, cost, and design requirements. Each chapter has an exercise set and a comprehensive bibliography of recent relevant publications. The appendix has brief descriptions of commercial parallel computers. Recommended for advanced undergraduate and graduate students. -M. B. Gokhale, University of Delaware