Radio design in nanometer technologies

Title:

Publication Information:

Dordrecht, The Netherlands : Springer, 2006

ISBN:

9781402048234

Subject Term:

Radio -- Receivers and reception

Nanotechnology

Added Author:

Ismail Mohammed

Rodriguez de Llera Gonzalez, Delia

Available:*

Library	Item Barcode	Call Number	Material Type	Item Category 1	Status
Searching... PSZ JB	30000010148649	TK6563 R324 2006	Open Access Book	Book	Searching... Unknown

Radio Design in Nanometer Technologies addresses current trends and future directions in radio design for wireless applications. As radio transceivers constitute the major bottleneck in a wireless chipset in terms of power consumption and die size, the radio must be designed in the context of the entire system, end to end. Therefore the book will address wireless systems as well as the DSP parts before it gets into coverage of radio design issues.

As such, the book is the first volume that looks at the integrated radio design problem as a "piece of a big puzzle", namely the entire chipset or single chip that builds an entire wireless system. This is the only way to successfully design radios to meet the stringent demands of today's increasingly complex wireless systems.

List of Figures	p. xi
List of Tables	p. xxi
Preface	p. xxiii
Acknowledgment	p. xxvii
Part I Current and Future Trends
1 "4G" and the Wireless World 2015 - Challenges in System Architectures and Communication Paradigms	p. 3
1 Introduction	p. 3
2 From the "Swiss Army Knife"...	p. 4
3 ...to Navigating the "Wireless Chaos"	p. 5
4 Six "Grand Challenges" in Wireless Systems	p. 7
5 Challenges in Radio Design - Flexible or Software Defined Radios	p. 9
6 Conclusions	p. 9
References	p. 10
2 Cellular RF Requirements and Integration Trends	p. 11
1 Handset Technology Drivers	p. 11
2 RF Transceiver Design Challenges	p. 16
3 Architectures	p. 23
4 Technology Scaling	p. 28
5 Handset Implementation Trends	p. 31
References	p. 33
3 Software Defined Radio - Visions, Challenges and Solutions	p. 35
1 Introduction	p. 35
2 Technical Visions	p. 36
3 Some Comments on Frequency Planning	p. 38
4 The Radio Challenge	p. 40
5 Power Consumption of the Analog to Digital Converter	p. 44
6 Other Key Components	p. 48
7 Example of a 160MHz Carrier SDR Front-End	p. 49
8 Example of a 2.4GHz Carrier Front-End	p. 50
9 Conclusion	p. 53
References	p. 55
Part II Digital SOC Design
4 Trends in SOC Architectures	p. 59
1 Introduction	p. 59
2 VLSI Design Space	p. 62
3 Conclusion	p. 79
4 Acknowledgement	p. 80
References	p. 80
5 Programmable Baseband Processors	p. 83
1 Introduction	p. 83
2 Baseband Processing Challenges	p. 84
3 Programmable Baseband Processors	p. 86
4 OFDM and WCDMA Example	p. 88
5 Multi-Standard Processor Design	p. 94
6 Conclusion	p. 99
References	p. 99
6 Analog-to-Digital Conversion Technologies For Software Defined Radios	p. 101
1 Introduction	p. 101
2 Why Software Defined Radios?	p. 102
3 Commercial SDRs and SRs	p. 103
4 Current and Future Radio Architectures	p. 104
5 Analog-To-Digital Conversion Challenges	p. 108
6 Reconfigurable ADCs for SDR/SR	p. 112
7 Conclusions	p. 119
References	p. 120
7 Reconfigurable A/D Converters for Flexible Wireless Transceivers in 4G Radios	p. 123
1 Introduction	p. 123
2 Towards 4G Radios	p. 124
3 Flexible Receiver Architectures	p. 126
4 Multi-standard A/D Converters	p. 127
References	p. 140
Part III Radio Design
8 Receiver Design for Integrated Multi-Standard Wireless Radios	p. 145
1 Introduction	p. 145
2 Multi-standard Receiver Design Considerations	p. 148
3 From Standard to Receiver Specs	p. 149
4 Frequency Planning	p. 156
5 Receiver Budget	p. 160
6 Case Study: WCDMA/WLAN Receiver Budget	p. 165
7 Conclusions	p. 169
References	p. 170
9 On-Chip ESD Protection for RFICS	p. 173
1 Introduction	p. 173
2 Full-chip Protection Topology	p. 173
3 ESD Protection Circuits for RF I/Os	p. 175
4 Inductor-based Protection Circuits	p. 181
5 ESD Testing of RFICs	p. 189
References	p. 190
10 Silicon-Based Millimeter-Wave Power Amplifiers	p. 193
1 Introduction	p. 193
2 Challenges in Microwave/Millimeter-Wave Power Amplifier Design	p. 194
3 Power Amplifier Design Approaches	p. 196
4 Power Combining Techniques	p. 202
5 Case Study: Design of a 24GHz Power Amplifier Based on Distributed Active Transformer	p. 205
6 Summary and Conclusions	p. 212
References	p. 214
11 Monolithic Inductor Modeling and Optimization	p. 217
1 Monolithic Inductor Modeling	p. 218
2 The Inductor CAD-Tool Indentro	p. 230
3 Verification of the Capacitance Model	p. 233
References	p. 238
12 Challenges in the Design of PLLS in Deep-Sub Micron Technology	p. 241
1 Introduction	p. 241
2 Technology Trends	p. 241
3 PLL Performance Metrics	p. 247
4 Impact of Technology Scaling	p. 261
5 Architecture Landscape	p. 272
References	p. 284
13 RFIC Design for First-Pass Silicon Success	p. 287
1 Introduction	p. 287
2 SoC Integration	p. 295
3 Self Awareness	p. 305
4 Self Calibration	p. 308
5 Self Configuration	p. 312
6 Leveraging Self Configuration for System Parameters	p. 312
7 Conclusion	p. 314
References	p. 314
About the Authors	p. 315
Index	p. 321

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