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Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
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Searching... | 30000010192996 | TK5105.78 E234 2008 | Open Access Book | Book | Searching... |
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Summary
Summary
1 During the last 30 years, wireless in communications has grown from a niche market to an economically vital consumer mass market. The first wave, with the breakthrough of 2G mobile telephony focused on speech, placed wireless communication in the consumer mass market. In the current second wave, services are extended toward true multimedia, including interactive video, audio, gaming, and broadband Internet. These high-data rate services, however, led to a separate IP-centric family of wireless personal (WPANs) and local area networks (WLANs) outside the 2G/3G mobile path. Since diversity between data- and voice-centric solutions and the competition between standardized and proprietary approaches is today more blocking than enabling effective development of successful products, a third major wave is unavoidable: a consolidation of both worlds in portable devices with flexible multistandard communication capabilities enabled for quality-of-service- 2 aware multimedia services. At the same time, the dominance of wired desktop personal computers has been undermined by the appearance of numerous portable and smart devices: laptops, notebooks, personal digital assistants, and gaming devices. Since these devices target low-cost consumer markets or face wired competition, time to market is crucial, designed-in flexibility is important, l- power operation is a key asset, yet device cost shall be at a minimum. This book approaches this design tradeoff challenge from the perspective of the system architect. The system architect is concerned both in an efficient design process and in a competitive design result.
Author Notes
After finishing his training as a banker, Mr. Schyra passed a part-time study to a Diplom-Kaufmann (FH) at the private University of applied sciences FOM. During this time he worked in the portfolio management of an Essen based private bank. In July 2010 he joined the board of the SWL Sustainable Wealth Lab AG where he is responsible for the treasury and the advisory business of the affiliated company InWert Financial Engineering AG. Furthermore in July 2012 he finished his part-time Ph.D. promotion under the title "Indices as Benchmark in the Portfolio Management - with Special Consideration of the European Monetary Union" at the Comenius University Bratislava, Slovakia. Besides this he acts as a lecturer at the FOM and publishes continuously about practical and scientific capital market topics.
Table of Contents
1 Introduction | p. 1 |
1.1 Context | p. 3 |
1.2 Motivation and Objectives | p. 5 |
1.3 Approach | p. 9 |
1.4 Preview of Contents and Contributions | p. 11 |
2 The System Design Process | p. 17 |
2.1 Design | p. 19 |
2.1.1 Design as a Process | p. 20 |
2.1.2 Application and Rationale of the Design Process | p. 24 |
2.2 Microelectronic System Design | p. 29 |
2.2.1 The Challenge of Complexity and Heterogeneity | p. 29 |
2.2.2 State of the Art in Electronic System-Level Design | p. 31 |
2.2.3 Synthesis of a Future-Proof Design Methodology | p. 34 |
2.3 Crossdisciplinarity | p. 37 |
2.3.1 Disciplines | p. 37 |
2.3.2 Consequences for the Design Process | p. 38 |
2.3.3 Consequences for the Designers and Design Methodologies | p. 39 |
2.3.4 Codesign of Design Technology and Application | p. 41 |
2.4 Conclusions | p. 42 |
3 Specification for a Wireless LAN Terminal | p. 45 |
3.1 Wireless Local Area Networks | p. 46 |
3.1.1 Wireless LAN Between Early Radio and 4G | p. 48 |
3.1.2 Requirements Analysis | p. 53 |
3.1.3 Conclusions | p. 58 |
3.2 Orthogonal Frequency Division Multiplexing | p. 60 |
3.2.1 Indoor Propagation Characteristics | p. 60 |
3.2.2 History and Principle of OFDM | p. 65 |
3.2.3 Mathematical Model | p. 70 |
3.2.4 Extension to a Practical System Model | p. 72 |
3.3 Requirements Specification for a Broadband WLAN Terminal | p. 76 |
3.4 Conclusions | p. 77 |
4 Efficient Digital VLSI Signal Processing for OFDM | p. 79 |
4.1 OFDM Baseband Signal Processing | p. 80 |
4.1.1 Functional Requirements | p. 80 |
4.1.2 State-of-the-Art Wireless OFDM Until 2001 | p. 85 |
4.2 Distributed Multiprocessor Architecture | p. 86 |
4.2.1 Directions for the Architecture Definition | p. 86 |
4.2.2 On-Chip Data and Control Flow Architecture | p. 87 |
4.2.3 Clocking Strategy and Low-Power Operation | p. 92 |
4.3 Digital Signal Processing Modules | p. 96 |
4.3.1 Latency-Aware Algorithm/Architecture Codesign: FFT | p. 97 |
4.3.2 Flexibility-Driven Design: Symbol (De)Construction | p. 103 |
4.3.3 Performance/Complexity-Aware Codesign: Equalization | p. 106 |
4.3.4 Energy-Aware Codesign: Acquisition | p. 113 |
4.4 Evaluation | p. 124 |
4.4.1 Experimental Results | p. 124 |
4.4.2 Testing and Application Demonstrators | p. 127 |
4.4.3 Comparison with the State of the Art After 2001 | p. 130 |
4.5 Conclusions | p. 131 |
5 Digital Compensation Techniques for Receiver Front-Ends | p. 133 |
5.1 Receiver Design | p. 135 |
5.1.1 Receiver Architectures and Their Nonidealities | p. 135 |
5.1.2 Our Contributions | p. 139 |
5.2 Automatic Gain Control and DC Offset Compensation | p. 140 |
5.2.1 A Survey of Existing Techniques | p. 142 |
5.2.2 A Simple AGC Approach and Analysis of Preamble Properties | p. 143 |
5.2.3 AGC/DCO Using Design-Time Information | p. 147 |
5.2.4 Exploration of Gain Selection and LO-RF Isolation | p. 159 |
5.3 Codesign of Automatic Gain Control and Timing Synchronization | p. 161 |
5.3.1 Preamble Structure and Improved Synchronization Algorithm | p. 161 |
5.3.2 Codesign of AGC and Timing Synchronization | p. 162 |
5.3.3 Complexity Assessment | p. 163 |
5.3.4 Performance Evaluation and Results | p. 163 |
5.4 Codesign of Filtering and Timing Synchronization | p. 164 |
5.4.1 Reasons for Performance Degradation | p. 165 |
5.4.2 Mitigation | p. 165 |
5.4.3 Synchronization Range and Filter Impulse Response | p. 165 |
5.4.4 Analysis and Optimization Methodology | p. 166 |
5.4.5 Results | p. 167 |
5.5 An Integrated Digitally Compensated Receiver | p. 168 |
5.5.1 RF Single-Package Receiver with Digital Compensation | p. 169 |
5.6 Conclusions | p. 172 |
6 Design Space Exploration for Transmitters | p. 175 |
6.1 Power/Performance Optimization at the Link Level | p. 177 |
6.1.1 Use Case-Driven Power/Performance Optimization | p. 178 |
6.1.2 Extension to Crosslayer Link-Level Optimization | p. 190 |
6.2 Run-Time Optimization for Optimum Power-Performance | p. 194 |
6.2.1 Transmit Chain Setup | p. 194 |
6.2.2 A Design-Time, Calibration-Time, and Run-Time Approach | p. 195 |
6.2.3 Measurements | p. 196 |
6.2.4 Results | p. 197 |
6.3 Summary and Discussion | p. 198 |
7 Methodologies for Transceiver Design | p. 201 |
7.1 A Practical Digital Design Flow | p. 204 |
7.1.1 A Digital Design Flow Based on OCAPI | p. 205 |
7.1.2 Extensions to OCAPI During the Design Phase | p. 207 |
7.1.3 Experience of (Re)Use | p. 208 |
7.2 Mixed-Signal System Simulation | p. 212 |
7.2.1 Design Challenges and State of the Art | p. 212 |
7.2.2 Fast System-Level Front-End Simulation (FAST) | p. 213 |
7.2.3 Extension to Mixed-Signal Cosimulation (FAST-OCAPI) | p. 214 |
7.2.4 Efficient Mixed-Signal Modeling Techniques | p. 220 |
7.3 Design-Time Run-Time Techniques | p. 227 |
7.3.1 Multiobjective Design-Time Optimization | p. 227 |
7.3.2 An Architecture for Run-Time Control Assisted by Design-Time Knowledge | p. 229 |
7.4 Conclusions | p. 230 |
8 Conclusions and Further Research | p. 233 |
8.1 Contributions to Application Design | p. 234 |
8.2 Contributions to Design Methodology and Technology | p. 235 |
8.2.1 A Practical System-Oriented Mixed-Signal Design Flow | p. 236 |
8.2.2 Methodologies for (Re)Configurable Mixed-Signal Design | p. 237 |
8.2.3 Crossdisciplinary Approach in System Design | p. 238 |
8.3 Further Research | p. 239 |
8.3.1 Suggestions for Application Design | p. 240 |
8.3.2 Suggestions for Design Methodologies and Technology | p. 243 |
8.3.3 Impact Beyond Engineering | p. 245 |
Glossary | p. 249 |
Bibliography | p. 259 |
Index | p. 287 |