Designing bipolar transistor radio frequency integrated circuits

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Title:

Personal Author:

Sweet, Allen A.

Series:

Artech House microwave library

Publication Information:

Boston, MA : Artech House Publishers, 2008

Physical Description:

xi, 317 p. : ill. ; 25 cm.

ISBN:

9781596931282

Subject Term:

Radio frequency integrated circuits

Available:*

Library	Item Barcode	Call Number	Material Type	Item Category 1	Status
Searching... PSZ JB	30000010169233	TK7874.78 S93 2008	Open Access Book	Book	Searching... Unknown

Radio frequency integrated circuits (RFICs) are an important part of today's wireless communications devices and infrastructure. An RFIC design approach involving cutting-edge bipolar technologies (GaAs HBT or SiGe HBT) has gained popularity among engineers due to its ability to maximize performance; however, it has been largely ignored in professional reference books. This book fills the gap, offering practitioners a detailed treatment of this increasingly important topic. From discussions of key applications (Bluetooth, UWB, GPS, WiMax) and architectures to in-depth coverage of fabrication technologies and amplifier design to a look at performance tradeoffs and production costs, this book arms engineers with complete design know-how for their challenging work in the field.

Author Notes

Allen A. Sweet is an adjunct professor of electrical engineering at Santa Clara University.

Acknowledgments	p. xi
Chapter 1 Introduction	p. 1
References	p. 11
Chapter 2 Applications	p. 13
2.1 Cellular/PCS Handsets	p. 13
2.2 Cellular/PCS Infrastructure	p. 15
2.3 WLANs	p. 16
2.4 Bluetooth	p. 17
2.5 UWB	p. 18
2.6 WiMax	p. 19
2.7 Digital TV and Set-Top Boxes	p. 20
2.8 Cognitive Radio	p. 20
2.9 Spectrum Allocation in the United States (All Frequencies in Megahertz)	p. 21
2.10 Physical Layer Standards	p. 22
References	p. 24
Chapter 3 RFIC Architectures	p. 25
3.1 I/Q Receivers	p. 25
3.2 I/Q Modulators	p. 30
3.3 Nonzero IF Receivers	p. 32
3.4 Zero IF Receivers	p. 37
3.5 Differential versus Single-Ended Topologies	p. 41
References	p. 41
Chapter 4 InGaP/GaAs HBT Fabrication Technology	p. 43
4.1 Transistor Structures	p. 43
4.2 Device Models	p. 45
4.3 Passive Structures, Their Electrical Models, and Layout Design Rules	p. 48
4.3.1 Microstrip Lines	p. 53
4.3.2 TFR Resistors	p. 55
4.3.3 M1-to-M2 Vias	p. 57
4.3.4 MIM Capacitors	p. 57
4.3.5 Substrate Vias	p. 58
4.3.6 Bonding Pads	p. 60
4.3.7 Crossover Capacitances	p. 61
4.3.8 Spiral Inductors	p. 62
4.3.9 Transistor Dummy Cells	p. 64
4.3.10 Significant Layout Parasitic Elements	p. 65
4.3.11 Simple Layout Example	p. 65
4.4 Maximum Electrical Ratings	p. 67
4.5 CAD Layout Tools	p. 70
References	p. 70
Chapter 5 SiGe HBT Fabrication Technology	p. 71
5.1 SiGe HBT Transistor Structures	p. 71
5.2 Transistor Device Models	p. 79
5.3 Passive Device Structures and Models	p. 81
5.4 Design Rules	p. 86
5.5 CAD Layout	p. 86
References	p. 87
Chapter 6 Passive Circuit Design	p. 89
6.1 Low-Pass Filters	p. 89
6.2 High-Pass Filters	p. 93
6.3 Band-Pass Filters	p. 93
6.4 Differential Filters	p. 95
6.5 Technology and Substrates	p. 99
6.6 Splitters/Dividers	p. 99
6.7 Phase Shifters and Baluns	p. 102
References	p. 104
Chapter 7 Amplifier Design Basics	p. 105
7.1 Matching Techniques	p. 105
7.2 Gain Compensation	p. 106
7.3 Fano's Limit	p. 106
7.4 Stability	p. 107
7.5 Noise Match	p. 109
7.6 Differential Amplifiers	p. 109
7.7 Cascode Amplifiers	p. 111
References	p. 113
Chapter 8 Low-Noise Amplifier Design	p. 115
8.1 Noise Figure Concepts	p. 115
8.2 Noise Temperature	p. 116
8.3 Front-end Attenuation and LNAs	p. 117
8.4 Multistage Noise Figure Contributions	p. 117
8.5 Circuit Topologies for Low Noise	p. 118
8.6 Design Example 1: Single-Ended PCS LNA	p. 126
8.7 Design Example 2: Three-Transistor Hybrid Darlington Differential LNA Using SiGe Technology	p. 127
References	p. 132
Chapter 9 Power Amplifier Design	p. 133
9.1 Loadline Concepts	p. 134
9.2 Maximum Power and Efficiency	p. 136
9.3 Class AB Power Amplifiers	p. 139
9.4 Definitions of Nonlinear Performance Metrics	p. 141
9.5 Adjacent Channel Power Ratio	p. 145
9.6 Error Vector Magnitude	p. 146
9.7 Circuit Topologies for PAs	p. 147
9.8 Matching Circuit Options	p. 149
9.9 Stability	p. 150
9.10 Bias Circuits	p. 150
9.11 Design Example 3: Wideband Gain Block Darlington Amplifier	p. 154
9.12 Design Example 4: Feedback Power Amplifier Design	p. 164
References	p. 171
Chapter 10 Designing Multistage Amplifiers	p. 173
10.1 Multistage LNAs	p. 173
10.2 Multistage Power Amplifiers	p. 175
10.3 Gain and Power Allocations	p. 177
10.4 Active Device Sizing	p. 177
10.5 Design Example 5: A Differential PCS PA	p. 181
References	p. 194
Chapter 11 Mixer/Modulator Design	p. 195
11.1 Mixer Basics	p. 195
11.2 Diode Mixers	p. 197
11.3 Single-Balanced Active Multiplying Mixers	p. 200
11.4 Fully Balanced Active Multiplying Mixers (Gilbert Cell)	p. 205
11.5 I/Q Mixers	p. 217
11.6 I/Q Modulators	p. 219
11.7 Design Example 6: Cellular/PCS Downconverting Mixer RFIC	p. 221
References	p. 230
Chapter 12 Frequency Multiplier Design	p. 231
12.1 Frequency Doublers	p. 231
12.2 Frequency Triplers	p. 233
12.3 Frequency Translators	p. 235
References	p. 239
Chapter 13 Voltage-Controlled Oscillator Design	p. 241
13.1 Varactor Diode Basics	p. 242
13.2 Negative-Resistance Concepts	p. 248
13.3 Types of Resonators	p. 252
13.4 Feedback Circuit Topologies for Producing Negative Resistance	p. 252
13.4.1 Negative-Resistance Oscillator Circuits	p. 252
13.4.2 The Colpitts Oscillator Circuit	p. 258
13.5 Frequency-Temperature Stability	p. 261
13.6 Phase Noise	p. 263
13.7 Quadrature Phase-Shifting Networks	p. 266
13.8 Ring Oscillators	p. 267
13.9 Design Example 7: 802.11a (Wi-Fi A) Differential VCO	p. 272
13.10 Figure of Merit	p. 278
13.11 Electronic Tuning and a Differential VCO Topology	p. 279
References	p. 281
Chapter 14 Layout Design Strategies	p. 283
14.1 Minimum Area	p. 283
14.2 "On-Chip" versus "Off-Chip" Component Decisions	p. 283
14.3 Minimizing Parasitics	p. 284
14.4 Testability	p. 285
14.5 Types of CAD Systems	p. 286
14.6 Foundry Comparison	p. 287
14.7 Reticle Assembly	p. 289
Chapter 15 RFIC Economics	p. 293
15.1 Levels of Integration	p. 293
15.2 Single-Ended versus Differential Topologies	p. 294
15.3 Process Technology Choices	p. 295
15.4 Area versus Performance Trade-offs	p. 296
15.5 Electrical Yield	p. 297
15.6 Prototype Costs	p. 298
15.7 Production Costs	p. 298
Acronyms	p. 301
About the Author	p. 305
Index	p. 307

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Author Notes

Table of Contents