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Summary
Summary
Genetic Programming IV: Routine Human-Competitive Machine Intelligence presents the application of GP to a wide variety of problems involving automated synthesis of controllers, circuits, antennas, genetic networks, and metabolic pathways. The book describes fifteen instances where GP has created an entity that either infringes or duplicates the functionality of a previously patented 20th-century invention, six instances where it has done the same with respect to post-2000 patented inventions, two instances where GP has created a patentable new invention, and thirteen other human-competitive results. The book additionally establishes:
GP now delivers routine human-competitive machine intelligence
GP is an automated invention machine
GP can create general solutions to problems in the form of parameterized topologies
GP has delivered qualitatively more substantial results in synchrony with the relentless iteration of Moore's Law
Author Notes
John R. Koza received his Ph.D. in Computer Science from the University of Michigan in 1972 under the supervision of John Holland. He was co-founder, Chairman, and CEO of Scientific Games Inc. from 1973 through 1987 where he co-invented the rub-off instant lottery ticket used by state lotteries. He has taught a course on genetic algorithms and genetic programming at Stanford University since 1988. He is currently a consulting professor in the Biomedical Informatics Program in the Department of Medicine at Stanford University and a consulting professor in the Department of Electrical Engineering at Stanford University
Martin A. Keane received a Ph.D. in Mathematics from Northwestern University in 1969. He worked for Applied Devices Corporation until 1972, in the Mathematics Department at General Motors Laboratory until 1976, and was Vice-President for Engineering of Bally Manufacturing Corporation until 1986. He is currently chief scientist of Econometrics Inc. of Chicago and a consultant to various computer-related and gaming-related companies
Matthew J. Streeter received a Masters degree in Computer Science from Worcester Polytechnic Institute in 2001. His Masters thesis applied genetic programming to the automated discovery of numerical approximation formulae for functions and surfaces. His primary research interest is applying genetic programming to problems of real-world scientific or practical importance. He is currently working at Genetic Programming Inc. as a systems programmer and researcher
William Mydlowec is Chief Executive Officer and co-founder of Pharmix Corporation, a venture-funded computational drug discovery company in Silicon Valley. He received his B.S. degree in Computer Science from Stanford University in 1998. He formerly did research at Genetic Programming Inc. with John Koza between 1997 and 2000
Jessen Yu is Director of Engineering of Pharmix Corporation. He received a B.S. degree in Computer Science and Chemistry from Stanford University. He formerly did research at Genetic Programming Inc. with John Koza between 1998 and 2000
Guido Lanza is Vice President of Biology and co-founder of Pharmix Corporation. He received his B.A. degree in 1998 from the University of California at Berkeley from the Department of Molecular and Cell Biology and Department of Integrative Biology. He received an M.Sc. in 1999 in Bioinformatics from the University of Manchester, UK. He formerly did research at Genetic Programming Inc. with John Koza in 2000
Table of Contents
1 Introduction | p. 1 |
1.1 Genetic Programming Now Routinely Delivers High-Return Human-Competitive Machine Intelligence | p. 3 |
1.1.1 What We Mean by "Human-Competitive" | p. 3 |
1.1.2 What We Mean by "High-Return" | p. 4 |
1.1.3 What We Mean by "Routine" | p. 5 |
1.1.4 What We Mean by "Machine Intelligence" | p. 6 |
1.1.5 Human-Competitiveness of the Results Produced by Genetic Programming | p. 7 |
1.1.6 High-Return of the Results Produced by Genetic Programming | p. 10 |
1.1.7 Routineness of the Results Produced by Genetic Programming | p. 14 |
1.1.8 Machine Intelligence | p. 15 |
1.2 Genetic Programming Is an Automated Invention Machine | p. 15 |
1.2.1 The Illogical Nature of Invention and Evolution | p. 19 |
1.2.2 Overcoming Established Beliefs | p. 20 |
1.2.3 Automating the Invention Process | p. 21 |
1.2.4 Patentable New Inventions Produced by Genetic Programming | p. 22 |
1.3 Genetic Programming Can Automatically Create Parameterized Topologies | p. 23 |
1.4 Historical Progression of Qualitatively More Substantial Results Produced by Genetic Programming in Synchrony with Increasing Computer Power | p. 25 |
2 Background on Genetic Programming | p. 29 |
2.1 Preparatory Steps of Genetic Programming | p. 29 |
2.2 Executional Steps of Genetic Programming | p. 31 |
2.2.1 Example of a Run of Genetic Programming | p. 34 |
2.3 Advanced Features of Genetic Programming | p. 38 |
2.3.1 Constrained Syntactic Structures | p. 38 |
2.3.2 Automatically Defined Functions | p. 39 |
2.3.3 Automatically Defined Iterations, Automatically Defined Loops, Automatically Defined Recursions, and Automatically Defined Stores | p. 40 |
2.3.4 Program Architecture and Architecture-Altering Operations | p. 40 |
2.3.5 Genetic Programming Problem Solver | p. 41 |
2.3.6 Developmental Genetic Programming | p. 41 |
2.3.7 Computer Code for Implementing Genetic Programming | p. 42 |
2.4 Main Points of Four Books on Genetic Programming | p. 42 |
2.5 Sources of Additional Information about Genetic Programming | p. 45 |
3 Automatic Synthesis of Controllers | p. 49 |
3.1 Background on Controllers | p. 50 |
3.2 Design Considerations for Controllers | p. 52 |
3.3 Representation of a Controller by a Block Diagram | p. 53 |
3.4 Possible Techniques for Designing Controllers | p. 58 |
3.4.1 Search by Hill Climbing | p. 59 |
3.4.2 Search by Gradient Methods | p. 60 |
3.4.3 Search by Simulated Annealing | p. 61 |
3.4.4 Search by Genetic Algorithm and Genetic Programming | p. 61 |
3.4.5 Previous Work on Controller Synthesis by Means of Genetic and Evolutionary Computation | p. 62 |
3.4.6 Possible Approaches to Automatic Controller Synthesis Using Genetic Programming | p. 62 |
3.5 Our Approach to the Automatic Synthesis of the Topology and Tuning of Controllers | p. 64 |
3.5.1 Repertoire of Functions | p. 65 |
3.5.2 Repertoire of Terminals | p. 67 |
3.5.3 Representing the Plant | p. 67 |
3.5.4 Automatically Defined Functions | p. 68 |
3.5.5 Three Approaches for Establishing Numerical Parameter Values | p. 69 |
3.5.6 Constrained Syntactic Structure for Program Trees | p. 73 |
3.6 Additional Representations of Controllers | p. 73 |
3.6.1 Representation of a Controller by a Transfer Function | p. 73 |
3.6.2 Representation of a Controller as a LISP Symbolic Expression | p. 74 |
3.6.3 Representation of a Controller as a Program Tree | p. 74 |
3.6.4 Representation of a Controller in Mathematica | p. 75 |
3.6.5 Representation of a Controller and Plant as a Connection List | p. 75 |
3.6.6 Representation of a Controller and Plant as a SPICE Netlist | p. 78 |
3.7 Two-Lag Plant | p. 87 |
3.7.1 Preparatory Steps for the Two-Lag Plant | p. 88 |
3.7.2 Results for the Two-Lag Plant | p. 102 |
3.7.3 Human-Competitiveness of the Result for the Two-Lag Plant Problem | p. 111 |
3.7.4 AI Ratio for the Two-Lag Plant Problem | p. 112 |
3.8 Three-Lag Plant | p. 113 |
3.8.1 Preparatory Steps for the Three-Lag Plant | p. 114 |
3.8.2 Results for the Three-Lag Plant | p. 115 |
3.8.3 Routineness for the Three-Lag Plant Problem | p. 119 |
3.8.4 AI Ratio for the Three-Lag Plant Problem | p. 119 |
3.9 Three-Lag Plant with a Five-Second Delay | p. 120 |
3.9.1 Preparatory Steps for the Three-Lag Plant with a Five-Second Delay | p. 120 |
3.9.2 Results for the Three-Lag Plant with a Five-Second Delay | p. 122 |
3.9.3 Routineness for the Three-Lag Plant with a Five-Second Delay | p. 123 |
3.9.4 AI Ratio for the Three-Lag Plant with a Five-Second Delay | p. 123 |
3.10 Non-Minimal-Phase Plant | p. 125 |
3.10.1 Preparatory Steps for the Non-Minimal-Phase Plant | p. 125 |
3.10.2 Results for the Non-Minimal Phase Plant | p. 125 |
3.10.3 Routineness for the Non-Minimal Phase Plant Problem | p. 127 |
3.10.4 AI Ratio for the Non-Minimal Phase Plant Problem | p. 127 |
4 Automatic Synthesis of Circuits | p. 129 |
4.1 Our Approach to the Automatic Synthesis of the Topology and Sizing of Circuits | p. 131 |
4.1.1 Evolvable Hardware | p. 134 |
4.2 Searching for the Impossible | p. 135 |
4.2.1 Preparatory Steps for the RC Circuit with Gain Greater than Two | p. 138 |
4.2.2 Results for the RC Circuit with Gain Greater than Two | p. 142 |
4.2.3 Routineness of the Transition from a Problem of Controller Synthesis to a Problem of Circuit Synthesis | p. 143 |
4.2.4 AI Ratio for the RC Circuit with Gain Greater than Two | p. 145 |
4.3 Reinvention of the Philbrick Circuit | p. 147 |
4.3.1 Preparatory Steps for the Philbrick Circuit | p. 148 |
4.3.2 Results for the Philbrick Circuit | p. 150 |
4.3.3 Human-Competitiveness of the Result for the Philbrick Circuit Problem | p. 151 |
4.3.4 Routineness for the Philbrick Circuit Problem | p. 152 |
4.3.5 AI Ratio for the Philbrick Circuit Problem | p. 153 |
4.4 Circuit for the NAND Function | p. 153 |
4.4.1 Preparatory Steps for the NAND Circuit | p. 154 |
4.4.2 Results for the NAND Circuit | p. 157 |
4.4.3 Human-Competitiveness of the Result for the NAND Circuit Problem | p. 158 |
4.4.4 Routineness for the NAND Circuit Problem | p. 159 |
4.4.5 AI Ratio for the NAND Circuit Problem | p. 159 |
4.5 Evolution of a Computer | p. 159 |
4.5.1 Preparatory Steps for the Arithmetic Logic Unit | p. 160 |
4.5.2 Results for the Arithmetic Logic Unit | p. 161 |
4.5.3 Routineness for the Arithmetic Logic Unit Circuit Problem | p. 161 |
4.5.4 AI Ratio for the Arithmetic Logic Unit Circuit Problem | p. 162 |
4.6 Square Root Circuit | p. 162 |
4.6.1 Preparatory Steps for Square Root Circuit | p. 163 |
4.6.2 Results for Square Root Circuit | p. 165 |
4.6.3 Routineness for the Square Root Circuit Problem | p. 168 |
4.6.4 AI Ratio for the Square Root Circuit Problem | p. 168 |
4.7 Automatic Circuit Synthesis Without an Explicit Test Fixture | p. 168 |
4.7.1 Preparatory Steps for the Lowpass Filter Problem Without an Explicit Test Fixture | p. 169 |
4.7.2 Results for the Lowpass Filter Problem without an Explicit Test Fixture | p. 173 |
4.7.3 Routineness for the Lowpass Filter Problem without an Explicit Test Fixture | p. 174 |
4.7.4 AI Ratio for the Lowpass Filter Problem without an Explicit Test Fixture | p. 174 |
5 Automatic Synthesis of Circuit Topology, Sizing, Placement, and Routing | p. 175 |
5.1 Our Approach to the Automatic Synthesis of Circuit Topology, Sizing, Placement, and Routing | p. 177 |
5.1.1 Initial Circuit | p. 177 |
5.1.2 Circuit-Constructing Functions | p. 178 |
5.1.3 Component-Creating Functions | p. 179 |
5.1.4 Topology-Modifying Functions | p. 181 |
5.1.5 Development-Controlling Functions | p. 186 |
5.1.6 Developmental Process | p. 186 |
5.2 Lowpass Filter with Layout | p. 186 |
5.2.1 Preparatory Steps for the Lowpass Filter with Layout | p. 186 |
5.2.2 Results for the Lowpass Filter with Layout | p. 188 |
5.2.3 Human-Competitiveness of the Result for the Lowpass Filter Problem with Layout | p. 195 |
5.2.4 Routineness of the Transition from a Problem of Circuit Synthesis without Layout to a Problem of Circuit Synthesis with Layout | p. 196 |
5.2.5 AI Ratio for the Lowpass Filter Problem with Layout | p. 197 |
5.3 60 dB Amplifier with Layout | p. 197 |
5.3.1 Preparatory Steps for 60 dB Amplifier with Layout | p. 197 |
5.3.2 Results for 60 dB Amplifier with Layout | p. 199 |
5.3.3 Routineness for the 60 dB Amplifier Problem with Layout | p. 202 |
5.3.4 AI Ratio for the 60 dB Amplifier Problem with Layout | p. 203 |
6 Automatic Synthesis of Antennas | p. 205 |
6.1 Our Approach to the Automatic Synthesis of the Geometry and Sizing of Antennas | p. 206 |
6.2 Illustrative Problem of Antenna Synthesis | p. 207 |
6.3 Repertoire of Functions and Terminals | p. 209 |
6.3.1 Repertoire of Functions | p. 209 |
6.3.2 Repertoire of Terminals | p. 210 |
6.3.3 Example of the Use of the Functions and Terminals | p. 211 |
6.4 Preparatory Steps for the Antenna Problem | p. 212 |
6.4.1 Program Architecture | p. 212 |
6.4.2 Function Set | p. 212 |
6.4.3 Terminal Set | p. 212 |
6.4.4 Fitness Measure | p. 212 |
6.4.5 Control Parameters | p. 216 |
6.5 Results for the Antenna Problem | p. 216 |
6.6 Routineness of the Transition from Problems of Synthesizing Controllers, Circuits, and Circuit Layout to a Problem of Synthesizing an Antenna | p. 219 |
6.7 AI Ratio for the Antenna Problem | p. 220 |
7 Automatic Synthesis of Genetic Networks | p. 221 |
7.1 Statement of the Illustrative Problem | p. 221 |
7.2 Representation of Genetic Networks by Computer Programs | p. 223 |
7.2.1 Repertoire of Functions | p. 223 |
7.2.2 Repertoire of Terminals | p. 224 |
7.3 Preparatory Steps | p. 224 |
7.3.1 Program Architecture | p. 224 |
7.3.2 Function Set | p. 224 |
7.3.3 Terminal Set | p. 224 |
7.3.4 Fitness Measure | p. 224 |
7.3.5 Control Parameters | p. 225 |
7.4 Results | p. 225 |
7.4.1 Routineness of the Transition from Problems of Synthesizing Controllers, Circuits, Circuits With Layout, and Antennas to a Problem of Genetic Network Synthesis | p. 226 |
7.4.2 AI Ratio for the Genetic Network Problem | p. 227 |
8 Automatic Synthesis of Metabolic Pathways | p. 229 |
8.1 Our Approach to the Automatic Synthesis of the Topology and Sizing of Networks of Chemical Reactions | p. 230 |
8.2 Statement of Two Illustrative Problems | p. 231 |
8.3 Types of Chemical Reactions | p. 234 |
8.3.1 One-Substrate, One-Product Reaction | p. 234 |
8.3.2 One-Substrate, Two-Product Reaction | p. 243 |
8.3.3 Two-Substrate, One-Product Reaction | p. 244 |
8.3.4 Two-Substrate, Two-Product Reaction | p. 248 |
8.4 Representation of Networks of Chemical Reactions by Computer Programs | p. 250 |
8.4.1 Representation as a Program Tree | p. 250 |
8.4.2 Representation as a Symbolic Expression | p. 255 |
8.4.3 Representation as a System of Nonlinear Differential Equations | p. 256 |
8.4.4 Representation as an Analog Electrical Circuit | p. 259 |
8.4.5 Flexibility of the Representation | p. 262 |
8.5 Preparatory Steps | p. 263 |
8.5.1 Program Architecture | p. 263 |
8.5.2 Function Set | p. 264 |
8.5.3 Terminal Set | p. 264 |
8.5.4 Fitness Measure | p. 264 |
8.5.5 Control Parameters | p. 267 |
8.6 Results for the Phospholipid Cycle | p. 267 |
8.6.1 Routineness of the Transition from Problem of Synthesizing Controllers, Circuits, Circuits with Layout, Antennas, and Genetic Networks to a Problem of Synthesis of a Network of Chemical Reactions | p. 274 |
8.6.2 AI Ratio for the Metabolic Pathway Problem for the Phospholipid Cycle | p. 275 |
8.7 Results for the Synthesis and Degradation of Ketone Bodies | p. 275 |
8.7.1 Routineness for the Metabolic Pathway Problem Involving Ketone Bodies | p. 278 |
8.7.2 AI Ratio for the Metabolic Pathway Problem Involving Ketone Bodies | p. 278 |
8.8 Future Work on Metabolic Pathways | p. 278 |
8.8.1 Improved Program Tree Representation | p. 278 |
8.8.2 Null Enzyme | p. 278 |
8.8.3 Minimum Amount of Data Needed | p. 278 |
8.8.4 Opportunities to Use Knowledge | p. 279 |
8.8.5 Designing Alternative Metabolisms | p. 279 |
9 Automatic Synthesis of Parameterized Topologies for Controllers | p. 281 |
9.1 Parameterized Controller for a Three-Lag Plant | p. 282 |
9.1.1 Preparatory Steps for the Parameterized Controller for a Three-Lag Plant | p. 283 |
9.1.2 Results for the Parameterized Controller for a Three-Lag Plant | p. 286 |
9.1.3 Routineness of the Transition from a Problem Involving a Non-Parameterized Controller to a Problem Involving a Parameterized Controller | p. 290 |
9.1.4 AI Ratio for the Parameterized Controller for a Three-Lag Plant | p. 291 |
9.2 Parameterized Controller for Two Families of Plants | p. 291 |
9.2.1 Preparatory Steps for the Parameterized Controller for Two Families of Plants | p. 292 |
9.2.2 Results for the Parameterized Controller for Two Families of Plants | p. 296 |
9.2.3 Human-Competitiveness of the Result for the Parameterized Controller for Two Families of Plants | p. 299 |
9.2.4 Routineness for the Parameterized Controller for Two Families of Plants | p. 300 |
9.2.5 AI Ratio for the Parameterized Controller for Two Families of Plants | p. 300 |
10 Automatic Synthesis of Parameterized Topologies for Circuits | p. 301 |
10.1 Five New Techniques | p. 301 |
10.1.1 New NODE Function for Connecting Distant Points | p. 302 |
10.1.2 Symmetry-Breaking Procedure using Geometric Coordinates | p. 303 |
10.1.3 Depth-First Evaluation | p. 304 |
10.1.4 New TWO_LEAD Function for Inserting Two-Leaded Components | p. 305 |
10.1.5 New Q Transistor-Creating Function | p. 305 |
10.2 Zobel Network with Two Free Variables | p. 306 |
10.2.1 Preparatory Steps for the Zobel Network Problem with Two Free Variables | p. 307 |
10.2.2 Results for the Zobel Network Problem with Two Free Variables | p. 310 |
10.2.3 Routineness fo the Transition from a Problem Involving a Non-Parameterized Circuit to a Problem Involving a Parameterized Circuit | p. 311 |
10.2.4 AI Ratio for the Zobel Network Problem with Two Free Variables | p. 312 |
10.3 Third-Order Elliptic Lowpass Filter with a Free Variable for the Modular Angle | p. 312 |
10.3.1 Preparatory Steps for the Third-Order Elliptic Lowpass Filter with a Free Variable for the Modular Angle | p. 313 |
10.3.2 Results for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle | p. 318 |
10.3.3 Routineness for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle | p. 324 |
10.3.4 AI Ratio for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle | p. 324 |
10.4 Passive Lowpass Filter with a Free Variable for the Passband Boundary | p. 324 |
10.4.1 Preparatory Steps for the Passive Lowpass Filter with a Free Variable for the Passband Boundary | p. 325 |
10.4.2 Results for the Passive Lowpass Filter with a Free Variable for the Passband Boundary | p. 328 |
10.4.3 Routineness for the Passive Lowpass Filter with a Free Variable for the Passband Boundary | p. 331 |
10.4.4 AI Ratio for the Passive Lowpass Filter with a Free Variable for the Passband Boundary | p. 332 |
10.5 Active Lowpass Filter with a Free Variable for the Passband Boundary | p. 332 |
10.5.1 Preparatory Steps for the Active Lowpass Filter with a Free Variable for the Passband Boundary | p. 333 |
10.5.2 Results for the Active Lowpass Filter with a Free Variable for the Passband Boundary | p. 335 |
10.5.3 Routineness for the Active Lowpass Filter with a Free Variable for the Passband Boundary | p. 339 |
10.5.4 AI Ratio for the Active Lowpass Filter with a Free Variable for the Passband Boundary | p. 339 |
11 Automatic Synthesis of Parameterized Topologies with Conditional Developmental Operators for Circuits | p. 341 |
11.1 Lowpass/Highpass Filter Circuit | p. 342 |
11.1.1 Preparatory Steps for the Lowpass/Highpass Filter | p. 342 |
11.1.2 Results for the Lowpass/Highpass Filter | p. 344 |
11.1.3 Routineness of the Transition from a Parameterized Topology Problem without Conditional Developmental Operators to a Problem with Conditional Developmental Operators | p. 348 |
11.1.4 AI Ratio for the Lowpass/Highpass Filter Problem | p. 348 |
11.2 Lowpass/Highpass Filter with Variable Passband Boundary | p. 348 |
11.2.1 Preparatory Steps for the Lowpass/Highpass Filter with Variable Passband Boundary | p. 349 |
11.2.2 Results for the Lowpass/Highpass Filter with a Variable Passband Boundary | p. 350 |
11.2.3 Routineness for the Lowpass/Highpass Filter with a Variable Passband Boundary | p. 357 |
11.2.4 AI Ratio for the Lowpass/Highpass Filter with a Variable Passband Boundary | p. 357 |
11.3 Quadratic/Cubic Computational Circuit | p. 358 |
11.3.1 Preparatory Steps for the Quadratic/Cubic Computational Circuit | p. 358 |
11.3.2 Results for the Quadratic/Cubic Computational Circuit | p. 360 |
11.4 A 40/60 dB Amplifier | p. 364 |
11.4.1 Preparatory Steps for the 40/60 dB Amplifier | p. 364 |
11.4.2 Results for 40/60 dB Amplifier | p. 366 |
12 Automatic Synthesis of Improved Tuning Rules for PID Controllers | p. 367 |
12.1 Test Bed of Plants | p. 371 |
12.2 Preparatory Steps for Improved PID Tuning Rules | p. 374 |
12.2.1 Program Architecture | p. 375 |
12.2.2 Terminal Set | p. 375 |
12.2.3 Function Set | p. 375 |
12.2.4 Fitness Measure | p. 375 |
12.2.5 Control Parameters | p. 376 |
12.3 Results for Improved PID Tuning Rules | p. 376 |
12.4 Human-Competitiveness of the Results for the Improved PID Tuning Rules | p. 382 |
12.5 Routineness of the Transition from Problems Involving Parameterized Topologies for Controllers to a Problem Involving PID Tuning Rules | p. 385 |
12.6 AI Ratio for the Improved PID Tuning Rules | p. 385 |
13 Automatic Synthesis of Parameterized Topologies for Improved Controllers | p. 387 |
13.1 Preparatory Steps for Improved General-Purpose Controllers | p. 387 |
13.1.1 Function Set | p. 388 |
13.1.2 Terminal Set | p. 388 |
13.1.3 Program Architecture | p. 389 |
13.1.4 Fitness Measure | p. 389 |
13.1.5 Control Parameters | p. 390 |
13.2 Results for Improved General-Purpose Controllers | p. 390 |
13.2.1 Results for First Run for Improved General-Purpose Controllers | p. 390 |
13.2.2 Results for Second Run for Improved General-Purpose Controllers | p. 398 |
13.2.3 Results for Third Run for Improved General-Purpose Controllers | p. 402 |
13.3 Human-Competitiveness of the Results for the Improved General-Purpose Controllers | p. 411 |
13.4 Routineness for the Improved General-Purpose Controllers | p. 412 |
13.5 AI Ratio for the Improved General-Purpose Controllers | p. 412 |
14 Reinvention of Negative Feedback | p. 413 |
14.1 Genetic Programming Takes a Ride on the Lackawanna Ferry | p. 414 |
14.1.1 Fitness Measure | p. 414 |
14.1.2 Initial Circuit, Function Set, Terminal Set, and Control Parameters | p. 415 |
14.2 Results for the Problem of Reducing Amplifier Distortion | p. 415 |
14.3 Human-Competitiveness of the Result for the Problem of Reducing Amplifier Distortion | p. 418 |
14.4 Routineness for the Problem of Reducing Amplifier Distortion | p. 419 |
14.5 AI Ratio for the Problem of Reducing Amplifier Distortion | p. 419 |
15 Automated Reinvention of Six Post-2000 Patented Circuits | p. 421 |
15.1 The Six Circuits | p. 423 |
15.1.1 Low-Voltage Balun Circuit | p. 423 |
15.1.2 Mixed Analog-Digital Variable Capacitor | p. 423 |
15.1.3 Voltage-Current Conversion Circuit | p. 423 |
15.1.4 Low-Voltage High-Current Transistor Circuit | p. 424 |
15.1.5 Cubic Function Generator | p. 424 |
15.1.6 Tunable Integrated Active Filter | p. 426 |
15.2 Uniformity of Treatment of the Six Problems | p. 426 |
15.3 Preparatory Steps for the Six Post-2000 Patented Circuits | p. 428 |
15.3.1 Initial Circuit | p. 428 |
15.3.2 Program Architecture | p. 433 |
15.3.3 Function Set | p. 433 |
15.3.4 Terminal Set | p. 434 |
15.3.5 Fitness Measure | p. 435 |
15.3.6 Control Parameters | p. 444 |
15.4 Results for the Six Post-2000 Patented Circuits | p. 444 |
15.4.1 Results for Low-Voltage Balun Circuit | p. 444 |
15.4.2 Results for Mixed Analog-Digital Variable Capacitor | p. 451 |
15.4.3 Results for High-Current Load Circuit | p. 454 |
15.4.4 Results for Voltage-Current Conversion Circuit | p. 458 |
15.4.5 Results for Cubic Function Generator | p. 461 |
15.4.6 Tunable Integrated Active Filter | p. 466 |
15.5 Commercial Practicality of Genetic Programming for Automated Circuit Synthesis | p. 478 |
15.6 Human-Competitiveness of the Results for the Six Post-2000 Patented Circuits | p. 481 |
15.7 Routineness for the Six Post-2000 Patented Circuits | p. 481 |
15.8 AI Ratio for the Six Post-2000 Patented Circuits | p. 482 |
16 Problems for Which Genetic Programming May Be Well Suited | p. 483 |
16.1 Characteristics Suggesting the Use of the Genetic Algorithm | p. 483 |
16.2 Characteristics Suggesting the Use of Genetic Programming | p. 484 |
16.2.1 Discovering the Size and Shape of the Solution | p. 484 |
16.2.2 Reuse of Substructures | p. 486 |
16.2.3 The Number of Substructures | p. 495 |
16.2.4 Hierarchical References among the Substructures | p. 496 |
16.2.5 Passing Parameters to Substructures | p. 497 |
16.2.6 Type of Substructures | p. 499 |
16.2.7 Number of Arguments Possessed by Substructures | p. 500 |
16.2.8 The Developmental Process | p. 500 |
16.2.9 Parameterized Topologies Containing Free Variables | p. 504 |
16.3 Characteristics Suggesting the Use of Genetic Methods | p. 505 |
16.3.1 Non-Greedy Nature of Genetic Methods | p. 505 |
16.3.2 Recombination in Conjunction with the Population in Genetic Methods | p. 506 |
17 Parallel Implementation and Computer Time | p. 515 |
17.1 Computer Systems Used for Work in This Book | p. 516 |
17.1.1 Alpha Parallel Computer System | p. 516 |
17.1.2 Pentium Parallel Computer System | p. 517 |
17.2 Computer Time for Problems in This Book | p. 518 |
18 Historical Perspective on Moore's Law and the Progression of Qualitatively More Substantial Results Produced by Genetic Programming | p. 523 |
18.1 Five Computer Systems Used in 15-Year Period | p. 523 |
18.2 Qualitative Nature of Results Produced by the Five Computer Systems | p. 524 |
18.3 Effect of Order-of-Magnitude Increases in Computer Power on the Qualitative Nature of the Results Produced by Genetic Programming | p. 526 |
19 Conclusion | p. 529 |
19.1 Genetic Programming Now Routinely Delivers High-Return Human-Competitive Machine Intelligence | p. 529 |
19.2 Genetic Programming Is an Automated Invention Machine | p. 530 |
19.3 Genetic Programming Can Automatically Create Parameterized Topologies | p. 530 |
19.4 Genetic Programming Has Delivered Qualitatively More Substantial Results in Synchrony with Increasing Computer Power | p. 531 |
Appendix A Functions and Terminals | p. 533 |
Appendix B Control Parameters | p. 539 |
Appendix C Patented or Patentable Inventions Generated by Genetic Programming | p. 551 |
Bibliography | p. 555 |
Index | p. 575 |