Summary

VLSI synthesis is a subject that is moving rapidly from the research laboratory into the industrial environment, and it is generally accepted that synthesis will gradually become the dominant design technique, surpassing conventional manual techniques. This book provides a timely overview on the various systems for logical and architectural synthesis for VLSI. It discusses the algorithms and techniques necessary for a synthesis system that is competitive with current design techniques for integrated circuits. The book covers both low-level logic synthesis techniques and higher-level architectural techniques, both of which are increasing in practical importance, since they will form the basis of the next generation of CAD software for integrated circuits. Three main topics are addressed: The first concerns two-level and multi-level synthesis. It includes PLA and PAL implementation as well as standard cell and compiled cell based synthesis. The second concerns controller synthesis with emphasis on optimisation methods. The third deals with high level synthesis (resource allocation, scheduling) as applied to DSP systems and processors consisting of controllers and data paths.