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Library | Item Barcode | Call Number | Material Type | Item Category 1 | Status |
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Searching... | 30000010338248 | TK7895.M4 N36 2014 | Open Access Book | Book | Searching... |
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Summary
Summary
Nanoscale memories are used everywhere. From your iPhone to a supercomputer, every electronic device contains at least one such type. With coverage of current and prototypical technologies, Nanoscale Semiconductor Memories: Technology and Applications presents the latest research in the field of nanoscale memories technology in one place. It also covers a myriad of applications that nanoscale memories technology has enabled.
The book begins with coverage of SRAM, addressing the design challenges as the technology scales, then provides design strategies to mitigate radiation induced upsets in SRAM. It discusses the current state-of-the-art DRAM technology and the need to develop high performance sense amplifier circuitry. The text then covers the novel concept of capacitorless 1T DRAM, termed as Advanced-RAM or A-RAM, and presents a discussion on quantum dot (QD) based flash memory.
Building on this foundation, the coverage turns to STT-RAM, emphasizing scalable embedded STT-RAM, and the physics and engineering of magnetic domain wall "racetrack" memory. The book also discusses state-of-the-art modeling applied to phase change memory devices and includes an extensive review of RRAM, highlighting the physics of operation and analyzing different materials systems currently under investigation.
The hunt is still on for universal memory that fits all the requirements of an "ideal memory" capable of high-density storage, low-power operation, unparalleled speed, high endurance , and low cost. Taking an interdisciplinary approach, this book bridges technological and application issues to provide the groundwork for developing custom designed memory systems.
Table of Contents
Preface | p. xi |
Editors | p. xvii |
Contributors | p. xix |
Part I Static Random Access Memory | |
Chapter 1 SRAM: The Benchmark of VLSI Technology | p. 3 |
Chapter 2 Complete Guide to Multiple Upsets in SRAMs Processed in Decananometric CMOS Technologies | p. 25 |
Chapter 3 Radiation Hardened by Design SRAM Strategies for TID and SEE Mitigation | p. 57 |
Part II Dynamic Random Access Memory | |
Chapter 4 DRAM Technology | p. 101 |
Chapter 5 Concepts of Capacitorless IT-DRAM and Unified Memory on SOI | p. 137 |
Chapter 6 A-RAM Family: Novel Capacitorless IT-DRAM Cells for 22 nm Nodes and Beyond | p. 157 |
Part III Novel Flash Memory | |
Chapter 7 Quantum Dot-Based Flash Memories | p. 183 |
Part IV Magnetic Memory | |
Chapter 8 Spin-Transfer-Torque MRAM | p. 203 |
Chapter 9 Magnetic Domain Wall "Racetrack" Memory | p. 229 |
Part V Phase-Change Memory | |
Chapter 10 Phase-Change Memory Cell Model and Simulation | p. 259 |
Chapter 11 Phase-Change Memory Devices and Electrothermal Modeling | p. 307 |
Part VI Resistive Random Access Memory | |
Chapter 12 Nonvolatile Memory Device: Resistive Random Access Memory | p. 333 |
Chapter 13 Nanoscale Resistive Random Access Memory: Materials, Devices, and Circuits | p. 361 |
Index | p. 419 |