Cover image for Failure-free integrated circuit packages : systematic elimination of failures through reliability engineering, failure analysis, and material improvements
Title:
Failure-free integrated circuit packages : systematic elimination of failures through reliability engineering, failure analysis, and material improvements
Series:
McGraw-Hill professional engineering
Publication Information:
New York : McGraw-Hill, 2005
ISBN:
9780071434843

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30000010064177 TK7872.15 F34 2005 Open Access Book Book
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Summary

Summary

Driven by the fast-growing market for personal electronic devices, integrated circuit complexity has increased as feature sizes shrink. The resulting integrated circuit devices are prone to more frequent failures, which must be found, identified, and fixed. This unique reference uses graphic illustrations to clearly identify all major failure mode types, allowing engineers to spot failures before they occur.


Author Notes

Charles Cohn is a distinguished member of the technical staff at Agere Systems, Allentown, Pennsylvania, where he is the lead resource on PCB technology, supporting the development of advanced organic PBGA substrates for wire bonded and flip chip IC interconnections. He has authored chapters in several McGraw-Hill electronic packaging handbooks and presented numerous papers on electronic packaging. He has been awarded 11 U.S. patents on IC packaging. Mr. Cohn holds B.S., M.S., and M.E. degrees in mechanical engineering from Columbia University.

Charles A. Harper is president of Technology Seminars, Inc., Lutherville, Maryland, an organization dedicated to the presentation of educational seminars on electronic packaging and materials. He has authored over a dozen well-known books in the field and is among the founders and past presidents of the International Microelectronics Electronic and Packaging Society. He is also series editor for the McGraw-Hill Electronic Packaging and Interconnection Series. Mr. Harper is a graduate of the Johns Hopkins University School of Engineering, where he also served as adjunct professor.

Joze E. Antol - Member of Technical Staff in the Packaging and Interconnect Technology Dept. at Agere Systems, Allentown, PA. She has worked at AT&T Bell Labs / Lucent Technologies / Agere Systems for 20 years. Her current assignment focuses on the effects of probe and packaging on advanced IC technologies, such as 130nm copper / Low K. Previous assignments at AT&T / Lucent included die/wire bond process engineer in manufacturing and laboratory analyst responsible for ICP emission spectroscopy. She holds an AS degree in Chemical Engineering from Pennsylvania State University.

Frank A. Baiocchi - Distinguished Member of Technical Staff at Agere Systems, Allentown, PA. Dr. Baiocchi has been with AT&T / Lucent Technologies / Agere Systems for 21 years and is currently an analyst in the Product Analysis Laboratory involved in failure site analysis on a wide variety of analog and digital technologies. He has had responsibility for plasma etch process development in support of a CMOS manufacturing line and developed an LDMOS wafer fabrication process for an RF power transistor product. His experience includes materials characterization for silicon and III-V based semiconductor devices, plasma process engineering and silicon process technology. He has published more than 40 technical articles on analysis of thin film materials using accelerator based techniques such as Rutherford Backscattering. Dr. Baiocchi holds a BS degree in Chemistry from DePaul University and a PhD degree in Physical Chemistry from Harvard University.

Anthony J. Bucha - Senior Member of Technical Staff at Agere Systems, Allentown, PA. Mr. Bucha has been with Western Electric / AT&T Technologies / Lucent Technologies/ and Agere Systems for 24 years and is currently a Senior Analyst in the Product Analysis Lab. His responsibilities include product analysis for the reliability, qualification and yield improvement programs as well as administration of the labs safety program, and ISO 9001/2000 standards and documentation implementation. Previous work included opto-electronic device analysis, wafer yield improvement, and process characterization. He has written and co-authored several papers on product analysis and deprocessing techniques, some which were presented at various conferences including the International Symposium for Testing and Failure Analysis. Mr. Bucha was an active member of SEMATECH/International and the International Symposium for Testing and Failure Analysis Society.

James T. Cargo - Technical Manager at Agere Systems, Allentown, PA. Mr. Cargo has been with AT&T Bell Labs / Lucent Technologies / Agere Systems for 19 years. He started his career in AT&T Bell Lab''s Integrated Circuits Technology R&D Laboratory. Over the years he has worked in several capacities including: ultra trace analytical chemistry, co-founding AT&T Analytical Services, Focused Ion Beam work and Failure Analysis, as they pertain to integrated circuits, optoelectronic components and MEMS devices. He has been actively involved in the Sematech Product Analysis Forum (PAF) and Sematech Assembly Analysis Forum (AAF). In addition, he has authored or coauthored more than 30 research papers and has 3 patents. Currently, Mr. Cargo manages Agere System''s Product Analysis Lab, which is responsible for integrated circuit/package analysis associated with customer returns, engineering studies, qualification, reliability, yield improvement, design modifications, and latch-up evaluation. Mr. Cargo holds a BS degree in Chemistry from Syracuse University, a MS degree in Chemistry and a MBA from Lehigh University

John M. DeLucca - Member of Technical Staff at Agere Systems, Allentown, PA. Dr. DeLucca has been with Lucent Technologies / Agere Systems for four years and is currently a product and failure analyst in the Product Analysis Laboratory. He is the lead resource for transmission electron microscopy issues supporting customer returns, developmental work, and intellectual property-related issues. Prior to joining the product analysis group, Dr. DeLucca worked in several capacities including Supply Line Management, Reliability and Qualification, and more recently, Customer Technical Support for optoelectronic products. Dr. DeLucca graduated in 2000 with a PhD in Materials Engineering from the Pennsylvania State University from which he also holds an MS degree in Materials. He received a BSE in Materials Science and Engineering from the University of Pennsylvania in 1994. He has written and presented several papers on processing and characterization of wide band gap semiconductors and was awarded a Materials Research Society Graduate Student award in 1998.

Barry J. Dutt - Distinguished Member of Technical Staff at Agere Systems, Allentown, PA. Mr. Dutt has been with AT&T Bell Labs / Lucent Technologies / Agere Systems for 23 years. For the past 14 years he has worked in failure analysis and is currently a senior analyst in the Product Analysis Laboratory. He routinely performs product analysis on qualification, reliability, and manufacturing failures as well as customer returns and engineering evaluations related to design and process development. Previous analysis activities have also included opto-electronic and MEM''s devices. While at Bell Laboratories, he was a member of the Digital Signal Processor design team, working in the areas of circuit simulation debug and circuit design. He has co-authored several papers, and presented at the International Symposium for Testing and Failure Analysis.

Jason P. Goodelle - Distinguished Member of Technical Staff at Agere Systems, Allentown, PA in the Packaging and Interconnect Technology Dept. In his 6 years with Agere Systems, he has been responsible for developing several advanced package assembly solutions (including flip chip and multi chip modules) both internally and through cooperative development efforts at various subcontractors. Dr. Goodelle obtained a BS in physics from Allegheny College and a PhD in Materials Science and Engineering from Lehigh University, specializing in mechanical and physical properties of bulk and thin film polymers. Dr. Goodelle has authored or co-authored several papers in the area of packaging solutions and materials for IC packaging.

Kultaransingh N. Hooghan - Senior Member of Technical Staff at Agere Systems, Allentown, PA. Mr. Hooghan has been with Lucent Technologies/Agere Systems for 7 years as a Failure Analyst in the Product Analysis Dept. His primary responsibility is carrying out Physical Failure Analyses using a Focused Ion Beam (FIB) system. He has three US patents pending on processes for FIB systems. Mr. Hooghan published numerous papers and authored a chapter in a book titled "Introduction to Focused Ion Beams: Instrumentation, Theory, Techniques, and Practice". He also presented seminars related to FIB Systems. He holds a Masters Degree in Physics from the Bombay University, India and a Masters Degree in Engineering Technology from the University of North Texas.

John W. Osenbach - Consulting Member of Technical Staff at Agere Systems, Allentown, PA. Dr. Osenbach has been with AT&T Bell Labs/Lucent Technologies/Agere Systems for 22 years. The first half was spent in the development and reliability of silicon technology processes and materials, primarily dielectrics and metals for application on high voltage, high speed, CMOS devices. The next 10 years were devoted to metals, dielectrics, and package development for single mode laser based products. He helped develop a device and package technology that provided for the first time a reliable non-hermetic single mode laser and photodiode package technology. Currently, Dr. Osenbach is focused on package technology development for silicon integrated circuits. He has authored and co-authored more than 70 papers and was awarded 33 US patents. He organized and chaired a number of conferences on silicon technology and optoelectronic packaging, and taught conference courses on reliability of optoelectronic devices. He is a past associate editor of the Journal of Electrochemical Society. In 1999 he was made a Bell Laboratories Fellow for his work on the development of materials and processes needed for the manufacture of reliable non-hermetic opto-electronic and SIC packages. He holds a BS, MS and PhD in Ceramic Science and Engineering from Pennsylvania State University.

Albert C. Seier - Member of Technical Staff at Agere Systems, Allentown, PA. Mr. Seier has been with Lucent/Agere for six years and is currently a product analyst focusing on Agere worldwide electrical failure analysis needs with emphasis on electrical hardware. In addition, he interfaces with quality


Table of Contents

Forewordp. vii
Prefacep. xi
About the Contributorsp. xiii
Chapter 1 Introductionp. 1
1.1 Overviewp. 1
1.2 More about the IC Packagep. 5
1.3 Multiple Technologies/Multiple Failure Mechanismsp. 8
1.4 Referencesp. 16
Chapter 2 Fundamentals of IC Package Technologiesp. 17
2.1 The IC Packagep. 17
2.2 Package Familiesp. 19
2.2.1 Through-Hole Mounted Packagesp. 20
2.2.2 Surface Mounted Packagesp. 23
2.3 Package Technologiesp. 26
2.3.1 Molded Plastic Technologyp. 27
2.3.2 Pressed Ceramic (Glass-Sealed Refractory) Technologyp. 30
2.3.3 Cofired Laminated Ceramic Technologyp. 32
2.3.4 Laminated Plastic Technologyp. 39
2.4 Comparison of Package Technologiesp. 56
2.5 Summary and Future Trendsp. 58
2.6 Referencesp. 62
Chapter 3 Device Reliabilityp. 65
3.1 What is Reliability?p. 65
3.2 Accelerated Agingp. 67
3.3 Failure Mode and Effects Analysisp. 69
3.4 The Kinetics of Degradationp. 70
3.5 Hazard Ratesp. 80
3.6 Common Mathematical Functions Used for Estimating Reliabilityp. 82
3.7 Cost of Reliabilityp. 84
3.8 Referencesp. 85
Chapter 4 Physics and Chemistry of Failures in Packaged Devicesp. 87
4.1 Introductionp. 87
4.2 Mass Transport Effectsp. 88
4.2.1 Solid-State Reactionsp. 88
4.2.2 Liquid-State Reactionsp. 96
4.2.3 Electromigrationp. 100
4.3 Thermal Mismatch Effectsp. 102
4.4 Humidity Effectsp. 111
4.5 Referencesp. 113
Chapter 5 Strategies for Locating Failuresp. 115
5.1 Interpreting Electrical Test Resultsp. 115
5.2 Using Package Design Files as Failure Roadmapsp. 116
5.2.1 Introduction to Package Design File Structuresp. 117
5.2.2 Wirebond Diagramsp. 117
5.2.3 Flip Chip Bump Mapsp. 119
5.2.4 Package Design Filesp. 120
5.2.5 Package Net Listsp. 123
5.3 Automated Test Equipment Failure Error Logs: Starting with the Failure Datap. 124
5.4 Test Vehicle Design with Improved Fault Isolation Capabilitiesp. 125
5.4.1 Issues with Fault Isolation Using Production Packaged Devicesp. 127
5.4.2 Cost of Doing Package Evaluations on Production Devicesp. 127
5.4.3 Benefits of Simplified Opens and Shorts Testing for Quick Evaluation of New Packagingp. 127
5.4.4 Generating Opens and Shorts Testers in Production Devicesp. 128
5.4.5 Single-Metal-Level Silicon Die as Drop in Opens and Shorts Testersp. 128
5.5 Case Study No. 1: Finite Element Analysis to Help Identify Root Causesp. 130
5.5.1 Package Informationp. 131
5.5.2 FEA Modeling Considerationsp. 133
5.5.3 Simulation Resultsp. 136
5.5.4 Discussionp. 137
5.6 Case Study No. 2: Large Die Flip Chip Test Vehiclep. 141
5.6.1 Test Vehicle Descriptionp. 142
5.6.2 Reliability Testing Programp. 146
5.6.3 Design of Experiment Descriptionsp. 149
5.6.4 Failure Analysis Approachp. 150
5.6.5 Finite Element Analysis Approachp. 150
5.6.6 Results and Discussionp. 151
5.6.7 Concluding Remarksp. 166
5.7 Case Study No. 3: Multichip Plastic BGAp. 168
5.7.1 Device Descriptionp. 169
5.7.2 Reliability Test Programp. 171
5.7.3 Finite Element Analysisp. 180
5.7.4 Design Of Experimentp. 184
5.7.5 Concluding Remarksp. 185
5.8 Conclusionp. 185
5.9 Referencesp. 186
Chapter 6 Failure Analysis Techniquesp. 187
6.1 Imaging Techniquesp. 187
6.1.1 Optical Microscopyp. 188
6.1.2 Real-Time X-Ray Analysisp. 189
6.1.3 Scanning Acoustic Microscopyp. 191
6.1.4 Thermal Imagingp. 197
6.1.5 Scanning Electron Microscopyp. 201
6.1.6 Transmission Electron Microscopyp. 204
6.1.7 Focused Ion Beamp. 208
6.1.8 Moire Interferometryp. 211
6.1.9 Shadow Moirep. 213
6.1.10 Scanning Superconducting Quantum Interference Device Microscopyp. 215
6.1.11 Dye Penetrant Leak Detectionp. 218
6.2 Analytical Techniquesp. 222
6.2.1 Energy Dispersive Spectroscopyp. 223
6.2.2 Auger Electron Spectroscopyp. 227
6.2.3 X-Ray Photoelectron Spectroscopyp. 229
6.2.4 Fourier Transform Infrared Spectroscopyp. 230
6.2.5 Wetting Balance Solderability Testp. 233
6.3 Electrical Techniquesp. 234
6.3.1 DC Electrical Characterizationp. 234
6.3.2 Time Domain Reflectometryp. 236
6.4 Destructive Techniquesp. 240
6.4.1 Package Decapsulation Techniquesp. 240
6.4.2 Mechanical Polish Techniquesp. 243
6.4.3 Dry Etching for Package FAp. 248
6.4.4 Wirebond Pull and Shearp. 251
6.5 Referencesp. 254
Chapter 7 Examples of Failure Modes Common in Organic IC Packagesp. 257
7.1 Introductionp. 257
7.2 Failures in Dual In-Line Packagesp. 258
7.2.1 Open Contacts--Lifted Ball Bondsp. 258
7.3 Failures in Quad Flat Packsp. 259
7.3.1 Open Contacts--Sheared Ball Bondsp. 259
7.3.2 Open Contacts--Sheared Ball Bondsp. 262
7.3.3 Opens and Shorts--Intermetallic Growthp. 263
7.3.4 Shorted Leads--Foreign Material between Leadsp. 264
7.3.5 Shorted Leads--Foreign Material between Leadsp. 266
7.4 Failures in Plastic Ball Grid Array Packagesp. 269
7.4.1 Open Contact--Via Barrel Crackingp. 269
7.4.2 Open Contacts--Cracked Signal Traces in Substratep. 272
7.4.3 Open Contacts--Via Knee Crackingp. 272
7.4.4 Open Contacts--Lifted Wedge Bondsp. 277
7.4.5 Open Contact--Cracked Via Barrelp. 281
7.4.6 Open Contact--Cracked Signal Trace in Substratep. 282
7.4.7 Open Contact--Lifted Ball Bondsp. 283
7.4.8 Open Contact--Broken Bond Wirep. 286
7.4.9 Open Contact--Cracked Diep. 287
7.4.10 Shorted Contacts--Die Attach Material on Exposed Cup. 288
7.5 Failures in Matrix Ball Grid Array Packagesp. 292
7.5.1 Open Contact--Via Knee Crackingp. 292
7.5.2 Substrate Opens--Cracked Signal Trace in Substratep. 293
7.6 Failures in Plastic BGA Multichip Modulesp. 295
7.6.1 Intermittent Open Contacts--Cracked Signal Tracesp. 295
7.6.2 Open Contacts--Cracked Signal Tracesp. 296
7.6.3 Functional--Dendritic Growthp. 298
7.6.4 Shorted Contacts--Die Attach Material on Exposed Cup. 302
7.7 Failures in Plastic Enhanced Ball Grid Array, Cavity-Down Packagesp. 302
7.7.1 Open Contacts--Broken Bond Wiresp. 302
7.7.2 Open Contacts--Sheared Ball Bonds/Damaged Signal Tracesp. 305
7.8 Failures in Plastic Flip Chip Ball Grid Array Packagesp. 305
7.8.1 Open Contacts--Cracks around FC Bump Padsp. 305
7.8.2 Open Contacts--Cracks around BGA Padsp. 309
7.8.3 Open Contacts--Flip Chip Bump Crackingp. 315
7.8.4 Open Contact--Incomplete Via Shapep. 317
7.8.5 Shorted Contacts--Vertical Deformation of Signal Tracep. 319
7.8.6 Shorted Contact--In-Plane Cu Bridgep. 321
Chapter 8 Emerging Assembly Materials for IC Packagingp. 325
8.1 Introductionp. 325
8.2 Lead-Free-Compatible Assembly Materialsp. 326
8.2.1 Characteristics Specific to Lead-Free Materialsp. 326
8.2.2 Lead-Free-Compatible Mold Compoundsp. 329
8.2.3 Lead-Free-Compatible Die Attachp. 348
8.3 Concluding Remarksp. 352
8.4 Referencesp. 353
Indexp. 355